linux-toradex.git/arch/powerpc/include/asm/reg.h, branch v4.7-rc3

powerpc: Use privileged SPR number for MMCR2

2016-05-31T10:08:32+00:00

We are already using the privileged versions of MMCR0, MMCR1
and MMCRA in the kernel, so for MMCR2, we should better use
the privileged versions, too, to be consistent.

Fixes: 240686c13687 ("powerpc: Initialise PMU related regs on Power8")
Cc: stable@vger.kernel.org # v3.10+
Suggested-by: Paul Mackerras 
Signed-off-by: Thomas Huth 
Acked-by: Paul Mackerras 
Signed-off-by: Michael Ellerman

powerpc: Fix definition of SIAR and SDAR registers

2016-05-31T10:07:56+00:00

The SIAR and SDAR registers are available twice, one time as SPRs
780 / 781 (unprivileged, but read-only), and one time as the SPRs
796 / 797 (privileged, but read and write). The Linux kernel code
currently uses the unprivileged  SPRs - while this is OK for reading,
writing to that register of course does not work.
Since the KVM code tries to write to this register, too (see the mtspr
in book3s_hv_rmhandlers.S), the contents of this register sometimes get
lost for the guests, e.g. during migration of a VM.
To fix this issue, simply switch to the privileged SPR numbers instead.

Cc: stable@vger.kernel.org
Signed-off-by: Thomas Huth 
Acked-by: Paul Mackerras 
Signed-off-by: Michael Ellerman

powerpc/mm/radix: Add radix callbacks for early init routines

2016-05-01T08:33:00+00:00

This adds routines for early setup for radix. We use device tree
property "ibm,processor-radix-AP-encodings" to find supported page
sizes. If we don't find the above we consider 64K and 4K as supported
page sizes.

We do map vmemap using 2M page size if we can. The linear mapping is
done such that we use required page size for that range. For example
memory of 3.5G is mapped such that we use 1G mapping till 3G range and
use 2M mapping for the rest.

Signed-off-by: Aneesh Kumar K.V 
Signed-off-by: Michael Ellerman

powerpc/mm/radix: Add partition table format & callback

2016-05-01T08:32:39+00:00

Add structs and #defines related to the radix MMU partition table
format. We also add a ppc_md callback for updating a partition table
entry.

Signed-off-by: Aneesh Kumar K.V 
Signed-off-by: Michael Ellerman

powerpc: Define PVR value for POWER8NVL processor

2016-04-11T10:30:46+00:00

Signed-off-by: Philippe Bergheaud 
Signed-off-by: Michael Ellerman

powerpc/8xx: Handle CPU6 ERRATA directly in mtspr() macro

2016-03-11T23:18:02+00:00

MPC8xx has an ERRATA on the use of mtspr() for some registers
This patch includes the ERRATA handling directly into mtspr() macro
so that mtspr() users don't need to bother about that errata

Signed-off-by: Christophe Leroy 
Signed-off-by: Scott Wood

powerpc: Prepare for splitting giveup_{fpu, altivec, vsx} in two

2016-03-02T12:34:48+00:00

This prepares for the decoupling of saving {fpu,altivec,vsx} registers and
marking {fpu,altivec,vsx} as being unused by a thread.

Currently giveup_{fpu,altivec,vsx}() does both however optimisations to
task switching can be made if these two operations are decoupled.
save_all() will permit the saving of registers to thread structs and leave
threads MSR with bits enabled.

This patch introduces no functional change.

Signed-off-by: Cyril Bur 
Signed-off-by: Michael Ellerman

powerpc: Fix misspellings in comments.

2016-03-01T08:27:20+00:00

Signed-off-by: Adam Buchbinder 
Signed-off-by: Michael Ellerman

Merge tag 'powerpc-4.4-3' into next

2015-12-14T09:40:32+00:00

Merge the two TM fixes we merged in 4.4. We are about to merge selftests
for these, and without the fixes the selftests will oops.

powerpc fixes for 4.4 #2

 - tm: Block signal return from setting invalid MSR state from Michael Neuling
 - tm: Check for already reclaimed tasks from Michael Neuling

powerpc: Add ppc_strict_facility_enable boot option

2015-12-01T02:52:26+00:00

Add a boot option that strictly manages the MSR unavailable bits.
This catches kernel uses of FP/Altivec/SPE that would otherwise
corrupt user state.

Signed-off-by: Anton Blanchard 
Signed-off-by: Michael Ellerman