linux-toradex.git/arch/powerpc/kernel/fpu.S, branch v3.4.2

powerpc: Remove second definition of STACK_FRAME_OVERHEAD

2010-11-29T04:48:23+00:00

Since STACK_FRAME_OVERHEAD is defined in asm/ptrace.h and that
is ASSEMBER safe, we can just include that instead of going via
asm-offsets.h.

Signed-off-by: Stephen Rothwell 
Signed-off-by: Benjamin Herrenschmidt

powerpc: Remove fpscr use from [kvm_]cvt_{fd,df}

2010-09-02T04:07:32+00:00

Neither lfs nor stfs touch the fpscr, so remove the restore/save of it
around them.

Signed-off-by: Andreas Schwab 
Signed-off-by: Benjamin Herrenschmidt

powerpc: Use names rather than numbers for SPRGs (v2)

2009-08-20T00:12:27+00:00

The kernel uses SPRG registers for various purposes, typically in
low level assembly code as scratch registers or to hold per-cpu
global infos such as the PACA or the current thread_info pointer.

We want to be able to easily shuffle the usage of those registers
as some implementations have specific constraints realted to some
of them, for example, some have userspace readable aliases, etc..
and the current choice isn't always the best.

This patch should not change any code generation, and replaces the
usage of SPRN_SPRGn everywhere in the kernel with a named replacement
and adds documentation next to the definition of the names as to
what those are used for on each processor family.

The only parts that still use the original numbers are bits of KVM
or suspend/resume code that just blindly needs to save/restore all
the SPRGs.

Signed-off-by: Benjamin Herrenschmidt

powerpc: Disable VSX or current process in giveup_fpu/altivec

2009-04-07T05:18:59+00:00

When we call giveup_fpu, we need to need to turn off VSX for the
current process.  If we don't, on return to userspace it may execute a
VSX instruction before the next FP instruction, and not have its
register state refreshed correctly from the thread_struct.  Ditto for
altivec.

This caused a bug where an unaligned lfs or stfs results in
fix_alignment calling giveup_fpu so it can use the FPRs (in order to
do a single <-> double conversion), and then returning to userspace
with FP off but VSX on.  Then if a VSX instruction is executed, before
another FP instruction, it will proceed without another exception and
hence have the incorrect register state for VSX registers 0-31.

   lfs unaligned   <- alignment exception turns FP off but leaves VSX on

   VSX instruction <- no exception since VSX on, hence we get the
                      wrong VSX register values for VSX registers 0-31,
                      which overlap the FPRs.

Signed-off-by: Michael Neuling 
Signed-off-by: Paul Mackerras

powerpc: Add VSX context save/restore, ptrace and signal support

2008-07-01T01:28:50+00:00

This patch extends the floating point save and restore code to use the
VSX load/stores when VSX is available.  This will make FP context
save/restore marginally slower on FP only code, when VSX is available,
as it has to load/store 128bits rather than just 64bits.

Mixing FP, VMX and VSX code will get constant architected state.

The signals interface is extended to enable access to VSR 0-31
doubleword 1 after discussions with tool chain maintainers.  Backward
compatibility is maintained.

The ptrace interface is also extended to allow access to VSR 0-31 full
registers.

Signed-off-by: Michael Neuling 
Signed-off-by: Paul Mackerras

powerpc: Add VSX assembler code macros

2008-07-01T01:28:48+00:00

This adds the macros for the VSX load/store instruction as most
binutils are not going to support this for a while.

Also add VSX register save/restore macros and vsr[0-63] register definitions.

Signed-off-by: Michael Neuling 
Signed-off-by: Paul Mackerras

powerpc: Make load_up_fpu and load_up_altivec callable

2008-07-01T01:28:45+00:00

Make load_up_fpu and load_up_altivec callable so they can be reused by
the VSX code.

Signed-off-by: Michael Neuling 
Signed-off-by: Paul Mackerras

[POWERPC] Restore copyright notice in arch/powerpc/kernel/fpu.S

2006-08-30T04:45:35+00:00

This code got moved from head.S but the copyright notice on head.S didn't
get transferred with it.  Noticed by Cort Dougan .

Signed-off-by: Paul Mackerras

Remove obsolete #include

2006-06-30T17:25:36+00:00

Signed-off-by: Jörn Engel 
Signed-off-by: Adrian Bunk

[POWERPC] 64bit FPSCR support

2006-06-15T09:31:25+00:00

Forthcoming machines will extend the FPSCR to 64 bits.  We already
had a 64-bit save area for the FPSCR, but we need to use a new form
of the mtfsf instruction.  Fortunately this new form is decoded as
an ordinary mtfsf by existing 64-bit processors.

Signed-off-by: Anton Blanchard 
Signed-off-by: Paul Mackerras