<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/powerpc/kernel/head_64.S, branch v2.6.16.45</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>ppc64: make sure to align stack pointer to 16 bytes at boot</title>
<updated>2006-03-04T23:00:45+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@quad.osdl.org</email>
</author>
<published>2006-03-04T23:00:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c05b47704570b015134522c36142cd17bd48640a'/>
<id>c05b47704570b015134522c36142cd17bd48640a</id>
<content type='text'>
yaboot is scrogged and calls us with an invalid stack alignment,
it seems.

Thanks to David Woodhouse to pointing me to the problem.

Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
yaboot is scrogged and calls us with an invalid stack alignment,
it seems.

Thanks to David Woodhouse to pointing me to the problem.

Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] powerpc64: remove broken/bitrotted HMT support</title>
<updated>2006-02-24T00:36:33+00:00</updated>
<author>
<name>Anton Blanchard</name>
<email>anton@samba.org</email>
</author>
<published>2006-02-13T07:11:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f1870f772c5e884862b4dd8f1ec2147247dda0ef'/>
<id>f1870f772c5e884862b4dd8f1ec2147247dda0ef</id>
<content type='text'>
HMT support is currently broken and needs to be reworked to play nicely
with the SMT scheduler. Remove the bit rotten bits for the time being.

I also updated an incorrect comment, we enter __secondary_hold with the
physical cpu id in r3.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
HMT support is currently broken and needs to be reworked to play nicely
with the SMT scheduler. Remove the bit rotten bits for the time being.

I also updated an incorrect comment, we enter __secondary_hold with the
physical cpu id in r3.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] powerpc: Fix runlatch performance issues</title>
<updated>2006-02-24T00:36:31+00:00</updated>
<author>
<name>Anton Blanchard</name>
<email>anton@samba.org</email>
</author>
<published>2006-02-13T03:48:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cb2c9b2741346eb23b177187a51ff5abf08295bd'/>
<id>cb2c9b2741346eb23b177187a51ff5abf08295bd</id>
<content type='text'>
The runlatch SPR can take a lot of time to write. My original runlatch
code would set it on every exception entry even though most of the time
this was not required. It would also continually set it in the idle
loop, which is an issue on an SMT capable processor.

Now we cache the runlatch value in a threadinfo bit, and only check for
it in decrementer and hardware interrupt exceptions as well as the idle
loop. Boot on POWER3, POWER5 and iseries, and compile tested on pmac32.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
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<pre>
The runlatch SPR can take a lot of time to write. My original runlatch
code would set it on every exception entry even though most of the time
this was not required. It would also continually set it in the idle
loop, which is an issue on an SMT capable processor.

Now we cache the runlatch value in a threadinfo bit, and only check for
it in decrementer and hardware interrupt exceptions as well as the idle
loop. Boot on POWER3, POWER5 and iseries, and compile tested on pmac32.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] powerpc: Make UP -&gt; SMP kexec work again</title>
<updated>2006-02-20T01:03:36+00:00</updated>
<author>
<name>Michael Ellerman</name>
<email>michael@ellerman.id.au</email>
</author>
<published>2006-02-16T03:13:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8fca92705ef462f39e7db5a0f7100bcaae91bfd3'/>
<id>8fca92705ef462f39e7db5a0f7100bcaae91bfd3</id>
<content type='text'>
For UP to SMP kexec to work we need to jump into pSeries_secondary_smp_init
event on a UP + KEXEC kernel. The secondary cpus will not find their hw_cpu_id
in the paca and so they'll jump into kexec_wait, ready for a kexec.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For UP to SMP kexec to work we need to jump into pSeries_secondary_smp_init
event on a UP + KEXEC kernel. The secondary cpus will not find their hw_cpu_id
in the paca and so they'll jump into kexec_wait, ready for a kexec.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] powerpc: Don't use toc in decrementer_iSeries_masked</title>
<updated>2006-02-07T10:51:53+00:00</updated>
<author>
<name>Michael Ellerman</name>
<email>michael@ellerman.id.au</email>
</author>
<published>2006-02-07T02:26:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f9b4045d6bbb109d066d127549b2beb38fd9bfc4'/>
<id>f9b4045d6bbb109d066d127549b2beb38fd9bfc4</id>
<content type='text'>
Since 404849bbd2bfd62e05b36f4753f6e1af6050a824 we've been using
LOAD_REG_ADDRBASE, which uses the toc pointer, in decrementer_iSeries_masked.

This can explode if we take the decrementer interrupt while we're in a module,
because the toc pointer in r2 will be the module's toc pointer.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Since 404849bbd2bfd62e05b36f4753f6e1af6050a824 we've been using
LOAD_REG_ADDRBASE, which uses the toc pointer, in decrementer_iSeries_masked.

This can explode if we take the decrementer interrupt while we're in a module,
because the toc pointer in r2 will be the module's toc pointer.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] powerpc: Remove lppaca structure from the PACA</title>
<updated>2006-01-13T10:17:39+00:00</updated>
<author>
<name>David Gibson</name>
<email>david@gibson.dropbear.id.au</email>
</author>
<published>2006-01-12T23:26:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3356bb9f7ba378a6e2709f9df95f4ea52111f4df'/>
<id>3356bb9f7ba378a6e2709f9df95f4ea52111f4df</id>
<content type='text'>
At present the lppaca - the structure shared with the iSeries
hypervisor and phyp - is contained within the PACA, our own low-level
per-cpu structure.  This doesn't have to be so, the patch below
removes it, making a separate array of lppaca structures.

This saves approximately 500*NR_CPUS bytes of image size and kernel
memory, because we don't need aligning gap between the Linux and
hypervisor portions of every PACA.  On the other hand it means an
extra level of dereference in many accesses to the lppaca.

The patch also gets rid of several places where we assign the paca
address to a local variable for no particular reason.

Signed-off-by: David Gibson &lt;dwg@au1.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
At present the lppaca - the structure shared with the iSeries
hypervisor and phyp - is contained within the PACA, our own low-level
per-cpu structure.  This doesn't have to be so, the patch below
removes it, making a separate array of lppaca structures.

This saves approximately 500*NR_CPUS bytes of image size and kernel
memory, because we don't need aligning gap between the Linux and
hypervisor portions of every PACA.  On the other hand it means an
extra level of dereference in many accesses to the lppaca.

The patch also gets rid of several places where we assign the paca
address to a local variable for no particular reason.

Signed-off-by: David Gibson &lt;dwg@au1.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] powerpc: Cleanup LOADADDR etc. asm macros</title>
<updated>2006-01-13T10:16:23+00:00</updated>
<author>
<name>David Gibson</name>
<email>david@gibson.dropbear.id.au</email>
</author>
<published>2006-01-13T03:56:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e58c3495e6007af59382540bb21ee941e470d88d'/>
<id>e58c3495e6007af59382540bb21ee941e470d88d</id>
<content type='text'>
This patch consolidates the variety of macros used for loading 32 or
64-bit constants in assembler (LOADADDR, LOADBASE, SET_REG_TO_*).  The
idea is to make the set of macros consistent across 32 and 64 bit and
to make it more obvious which is the appropriate one to use in a given
situation.  The new macros and their semantics are described in the
comments in ppc_asm.h.

In the process, we change several places that were unnecessarily using
immediate loads on ppc64 to use the GOT/TOC.  Likewise we cleanup a
couple of places where we were clumsily subtracting PAGE_OFFSET with
asm instructions to use assemble-time arithmetic or the toreal() macro
instead.

Signed-off-by: David Gibson &lt;dwg@au1.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch consolidates the variety of macros used for loading 32 or
64-bit constants in assembler (LOADADDR, LOADBASE, SET_REG_TO_*).  The
idea is to make the set of macros consistent across 32 and 64 bit and
to make it more obvious which is the appropriate one to use in a given
situation.  The new macros and their semantics are described in the
comments in ppc_asm.h.

In the process, we change several places that were unnecessarily using
immediate loads on ppc64 to use the GOT/TOC.  Likewise we cleanup a
couple of places where we were clumsily subtracting PAGE_OFFSET with
asm instructions to use assemble-time arithmetic or the toreal() macro
instead.

Signed-off-by: David Gibson &lt;dwg@au1.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: unbreak iSeries compilation again</title>
<updated>2006-01-09T10:32:42+00:00</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@samba.org</email>
</author>
<published>2006-01-09T10:32:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=be42d5fa3772241b8ecebd443f1fb36247959c54'/>
<id>be42d5fa3772241b8ecebd443f1fb36247959c54</id>
<content type='text'>
We don't set CONFIG_PPC_MULTIPLATFORM on iSeries (yet).  Avoid
compiling in the prom_init stuff on iSeries.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We don't set CONFIG_PPC_MULTIPLATFORM on iSeries (yet).  Avoid
compiling in the prom_init stuff on iSeries.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] powerpc: Remove old comment in head.S</title>
<updated>2006-01-09T03:53:44+00:00</updated>
<author>
<name>Anton Blanchard</name>
<email>anton@samba.org</email>
</author>
<published>2005-12-12T20:56:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=448b2719408c736080e1147c615ccefce16ede41'/>
<id>448b2719408c736080e1147c615ccefce16ede41</id>
<content type='text'>
Remove a comment in head.S which is no longer relevant.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove a comment in head.S which is no longer relevant.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] powerpc: Fixups for kernel linked at 32 MB</title>
<updated>2006-01-09T03:52:25+00:00</updated>
<author>
<name>Michael Ellerman</name>
<email>michael@ellerman.id.au</email>
</author>
<published>2005-12-05T21:49:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=758438a7b8da593c9116e95cc7fdff6e9e0b0c40'/>
<id>758438a7b8da593c9116e95cc7fdff6e9e0b0c40</id>
<content type='text'>
There's a few places where we need to fix things up for the kernel to work
if it's linked at 32MB:

 - platforms/powermac/smp.c
   To start secondary cpus on pmac we patch the reset vector, which is fine.
   Except if we're above 32MB we don't have enough bits for an absolute branch,
   it needs to relative.
 - kernel/head_64.s
    - A few branches in the cpu hold code need to load the full target address
      and do a bctr.
    - after_prom_start needs to load PHYSICAL_START as the dest address, not 0.
    - The exception prolog needs to load the low word of the target adddress,
      not just the low halfword.
    - Fixup handling of the initial stab address.
 - kernel/setup_64.c
   smp_release_cpus() needs to write 1 to the spinloop flag near 0, not 32 MB.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There's a few places where we need to fix things up for the kernel to work
if it's linked at 32MB:

 - platforms/powermac/smp.c
   To start secondary cpus on pmac we patch the reset vector, which is fine.
   Except if we're above 32MB we don't have enough bits for an absolute branch,
   it needs to relative.
 - kernel/head_64.s
    - A few branches in the cpu hold code need to load the full target address
      and do a bctr.
    - after_prom_start needs to load PHYSICAL_START as the dest address, not 0.
    - The exception prolog needs to load the low word of the target adddress,
      not just the low halfword.
    - Fixup handling of the initial stab address.
 - kernel/setup_64.c
   smp_release_cpus() needs to write 1 to the spinloop flag near 0, not 32 MB.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
