linux-toradex.git/arch/powerpc/kernel/head_8xx.S, branch v3.12.16

powerpc: Remove the empty giveup_fpu() function on 32bit kernel

2013-08-14T04:59:50+00:00

Instead of implementing an empty giveup_fpu() function for each
32bit processor type, replace them with an unique empty inline
function.

Signed-off-by: Kevin Hao 
Signed-off-by: Benjamin Herrenschmidt

powerpc: Call do_page_fault() with interrupts off

2012-03-08T23:55:08+00:00

We currently turn interrupts back to their previous state before
calling do_page_fault(). This can be annoying when debugging as
a bad fault will potentially have lost some processor state before
getting into the debugger.

We also end up calling some generic code with interrupts enabled
such as notify_page_fault() with interrupts enabled, which could
be unexpected.

This changes our code to behave more like other architectures,
and make the assembly entry code call into do_page_faults() with
interrupts disabled. They are conditionally re-enabled from
within do_page_fault() in the same spot x86 does it.

While there, add the might_sleep() test in the case of a successful
trylock of the mmap semaphore, again like x86.

Also fix a bug in the existing assembly where r12 (_MSR) could get
clobbered by C calls (the DTL accounting in the exception common
macro and DISABLE_INTS) in some cases.

Signed-off-by: Benjamin Herrenschmidt 
---

v2. Add the r12 clobber fix

powerpc/32: Pass device tree address as u64 to machine_init

2011-09-19T23:19:47+00:00

u64 is used rather than phys_addr_t to keep things simple, as
this is called from assembly code.

Update callers to pass a 64-bit address in r3/r4.  Other unused
register assignments that were once parameters to machine_init
are dropped.

For FSL BookE, look up the physical address of the device tree from the
effective address passed in r3 by the loader.  This is required for
situations where memory does not start at zero (due to AMP or IOMMU-less
virtualization), and thus the IMA doesn't start at zero, and thus the
device tree effective address does not equal the physical address.

Signed-off-by: Scott Wood 
Signed-off-by: Benjamin Herrenschmidt

powerpc: Remove second definition of STACK_FRAME_OVERHEAD

2010-11-29T04:48:23+00:00

Since STACK_FRAME_OVERHEAD is defined in asm/ptrace.h and that
is ASSEMBER safe, we can just include that instead of going via
asm-offsets.h.

Signed-off-by: Stephen Rothwell 
Signed-off-by: Benjamin Herrenschmidt

powerpc/8xx: Use SPRG2 and DAR registers to stash r11 and cr.

2010-04-07T08:00:34+00:00

This avoids storing these registers in memory.
CPU6 errata will still use the old way.
Remove some G2 leftover accesses from 2.4

Signed-off-by: Joakim Tjernlund 
Signed-off-by: Benjamin Herrenschmidt

powerpc/8xx: Don't touch ACCESSED when no SWAP.

2010-04-07T08:00:33+00:00

Only the swap function cares about the ACCESSED bit in
the pte. Do not waste cycles updateting ACCESSED when swap
is not compiled into the kernel.

Signed-off-by: Joakim Tjernlund 
Signed-off-by: Benjamin Herrenschmidt

powerpc/8xx: Avoid testing for kernel space in ITLB Miss.

2010-04-07T08:00:32+00:00

Only modules will cause ITLB Misses as we always pin
the first 8MB of kernel memory.

Signed-off-by: Joakim Tjernlund 
Signed-off-by: Benjamin Herrenschmidt

powerpc/8xx: Optimze TLB Miss handlers

2010-04-07T08:00:31+00:00

This removes a couple of insn's from the TLB Miss
handlers whithout changing functionality.

Signed-off-by: Joakim Tjernlund 
Signed-off-by: Benjamin Herrenschmidt

powerpc/8xx: Fix user space TLB walk in dcbX fixup

2010-01-15T02:26:16+00:00

The newly added fixup for buggy dcbX insn's has
a bug that always trigger a kernel TLB walk so a user space
dcbX insn will cause a Kernel Machine Check if it hits DTLB error.

Signed-off-by: Joakim Tjernlund 
Signed-off-by: Benjamin Herrenschmidt

powerpc/8xx: Always pin kernel instruction TLB

2010-01-15T02:20:07+00:00

Various kernel asm modifies SRR0/SRR1 just before executing
a rfi. If such code crosses a page boundary you risk a TLB miss
which will clobber SRR0/SRR1. Avoid this by always pinning
kernel instruction TLB space.

Signed-off-by: Joakim Tjernlund 
Signed-off-by: Benjamin Herrenschmidt