<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/powerpc/kernel/head_booke.h, branch v4.2-rc8</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>powerpc: Fix interrupt range check on debug exception</title>
<updated>2013-05-02T00:31:01+00:00</updated>
<author>
<name>Bharat Bhushan</name>
<email>r65777@freescale.com</email>
</author>
<published>2013-04-29T22:18:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fc2a6cfe05a33891180a27d55983febe170bc0f8'/>
<id>fc2a6cfe05a33891180a27d55983febe170bc0f8</id>
<content type='text'>
We do not want to take single step and branch-taken debug exception
in kernel exception code. But the address range check was not covering
all kernel exception handlers address range.

With this patch we defined the interrupt_end label which defines the
end on kernel exception code. So now we check interrupt_base to
interrupt_end range for not handling debug exception in kernel
exception entry.

Signed-off-by: Bharat Bhushan &lt;bharat.bhushan@freescale.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We do not want to take single step and branch-taken debug exception
in kernel exception code. But the address range check was not covering
all kernel exception handlers address range.

With this patch we defined the interrupt_end label which defines the
end on kernel exception code. So now we check interrupt_base to
interrupt_end range for not handling debug exception in kernel
exception entry.

Signed-off-by: Bharat Bhushan &lt;bharat.bhushan@freescale.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/booke: Remove obsolete macro FINISH_EXCEPTION</title>
<updated>2013-04-30T05:59:32+00:00</updated>
<author>
<name>Kevin Hao</name>
<email>haokexin@gmail.com</email>
</author>
<published>2013-04-29T00:59:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=177c19237b886a2ab71011c9e6f40190e5c24b83'/>
<id>177c19237b886a2ab71011c9e6f40190e5c24b83</id>
<content type='text'>
This is stale and not used by anyone now.

Signed-off-by: Kevin Hao &lt;haokexin@gmail.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is stale and not used by anyone now.

Signed-off-by: Kevin Hao &lt;haokexin@gmail.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>KVM: PPC: booke: category E.HV (GS-mode) support</title>
<updated>2012-04-08T09:51:19+00:00</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2011-12-20T15:34:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d30f6e480055e5be12e7a03fd11ea912a451daa5'/>
<id>d30f6e480055e5be12e7a03fd11ea912a451daa5</id>
<content type='text'>
Chips such as e500mc that implement category E.HV in Power ISA 2.06
provide hardware virtualization features, including a new MSR mode for
guest state.  The guest OS can perform many operations without trapping
into the hypervisor, including transitions to and from guest userspace.

Since we can use SRR1[GS] to reliably tell whether an exception came from
guest state, instead of messing around with IVPR, we use DO_KVM similarly
to book3s.

Current issues include:
 - Machine checks from guest state are not routed to the host handler.
 - The guest can cause a host oops by executing an emulated instruction
   in a page that lacks read permission.  Existing e500/4xx support has
   the same problem.

Includes work by Ashish Kalra &lt;Ashish.Kalra@freescale.com&gt;,
Varun Sethi &lt;Varun.Sethi@freescale.com&gt;, and
Liu Yu &lt;yu.liu@freescale.com&gt;.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
[agraf: remove pt_regs usage]
Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Chips such as e500mc that implement category E.HV in Power ISA 2.06
provide hardware virtualization features, including a new MSR mode for
guest state.  The guest OS can perform many operations without trapping
into the hypervisor, including transitions to and from guest userspace.

Since we can use SRR1[GS] to reliably tell whether an exception came from
guest state, instead of messing around with IVPR, we use DO_KVM similarly
to book3s.

Current issues include:
 - Machine checks from guest state are not routed to the host handler.
 - The guest can cause a host oops by executing an emulated instruction
   in a page that lacks read permission.  Existing e500/4xx support has
   the same problem.

Includes work by Ashish Kalra &lt;Ashish.Kalra@freescale.com&gt;,
Varun Sethi &lt;Varun.Sethi@freescale.com&gt;, and
Liu Yu &lt;yu.liu@freescale.com&gt;.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
[agraf: remove pt_regs usage]
Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/booke: Provide exception macros with interrupt name</title>
<updated>2012-04-08T09:51:17+00:00</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2011-12-20T15:34:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cfac57847a67c4903f34a77e971521531bbc7c77'/>
<id>cfac57847a67c4903f34a77e971521531bbc7c77</id>
<content type='text'>
DO_KVM will need to identify the particular exception type.

There is an existing set of arbitrary numbers that Linux passes,
but it's an undocumented mess that sort of corresponds to server/classic
exception vectors but not really.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
DO_KVM will need to identify the particular exception type.

There is an existing set of arbitrary numbers that Linux passes,
but it's an undocumented mess that sort of corresponds to server/classic
exception vectors but not really.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Call do_page_fault() with interrupts off</title>
<updated>2012-03-08T23:55:08+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2012-03-07T05:48:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a546498f3bf9aac311c66f965186373aee2ca0b0'/>
<id>a546498f3bf9aac311c66f965186373aee2ca0b0</id>
<content type='text'>
We currently turn interrupts back to their previous state before
calling do_page_fault(). This can be annoying when debugging as
a bad fault will potentially have lost some processor state before
getting into the debugger.

We also end up calling some generic code with interrupts enabled
such as notify_page_fault() with interrupts enabled, which could
be unexpected.

This changes our code to behave more like other architectures,
and make the assembly entry code call into do_page_faults() with
interrupts disabled. They are conditionally re-enabled from
within do_page_fault() in the same spot x86 does it.

While there, add the might_sleep() test in the case of a successful
trylock of the mmap semaphore, again like x86.

Also fix a bug in the existing assembly where r12 (_MSR) could get
clobbered by C calls (the DTL accounting in the exception common
macro and DISABLE_INTS) in some cases.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
---

v2. Add the r12 clobber fix
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We currently turn interrupts back to their previous state before
calling do_page_fault(). This can be annoying when debugging as
a bad fault will potentially have lost some processor state before
getting into the debugger.

We also end up calling some generic code with interrupts enabled
such as notify_page_fault() with interrupts enabled, which could
be unexpected.

This changes our code to behave more like other architectures,
and make the assembly entry code call into do_page_faults() with
interrupts disabled. They are conditionally re-enabled from
within do_page_fault() in the same spot x86 does it.

While there, add the might_sleep() test in the case of a successful
trylock of the mmap semaphore, again like x86.

Also fix a bug in the existing assembly where r12 (_MSR) could get
clobbered by C calls (the DTL accounting in the exception common
macro and DISABLE_INTS) in some cases.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
---

v2. Add the r12 clobber fix
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/85xx: Save scratch registers to thread info instead of using SPRGs.</title>
<updated>2011-06-23T02:44:55+00:00</updated>
<author>
<name>Ashish Kalra</name>
<email>Ashish.Kalra@freescale.com</email>
</author>
<published>2011-04-22T21:48:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1325a684b553d4b5c41ae0482f8991b43f945746'/>
<id>1325a684b553d4b5c41ae0482f8991b43f945746</id>
<content type='text'>
We expect this is actually faster, and we end up needing more space than we
can get from the SPRGs in some instances.  This is also useful when running
as a guest OS - SPRGs4-7 do not have guest versions.

8 slots are allocated in thread_info for this even though we only actually
use 4 of them - this allows space for future code to have more scratch
space (and we know we'll need it for things like hugetlb).

Signed-off-by: Ashish Kalra &lt;Ashish.Kalra@freescale.com&gt;
Signed-off-by: Becky Bruce &lt;beckyb@kernel.crashing.org&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We expect this is actually faster, and we end up needing more space than we
can get from the SPRGs in some instances.  This is also useful when running
as a guest OS - SPRGs4-7 do not have guest versions.

8 slots are allocated in thread_info for this even though we only actually
use 4 of them - this allows space for future code to have more scratch
space (and we know we'll need it for things like hugetlb).

Signed-off-by: Ashish Kalra &lt;Ashish.Kalra@freescale.com&gt;
Signed-off-by: Becky Bruce &lt;beckyb@kernel.crashing.org&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/booke: Add Stack Marking support to Booke Exception Prolog</title>
<updated>2010-05-05T12:01:52+00:00</updated>
<author>
<name>Torez Smith</name>
<email>lnxtorez@linux.vnet.ibm.com</email>
</author>
<published>2010-03-05T10:43:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=471c70ff39809af783c7718defe574a9ba81dd26'/>
<id>471c70ff39809af783c7718defe574a9ba81dd26</id>
<content type='text'>
This patch adds a marker to the exception stack frame to aid in debugging.
It's already inserted on other platforms and xmon recognizes it and
identifies exception frames when showing stack traces.

Signed-off-by: Torez Smith  &lt;lnxtorez@linux.vnet.ibm.com&gt;
Signed-off-by: Dave Kleikamp &lt;shaggy@linux.vnet.ibm.com&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds a marker to the exception stack frame to aid in debugging.
It's already inserted on other platforms and xmon recognizes it and
identifies exception frames when showing stack traces.

Signed-off-by: Torez Smith  &lt;lnxtorez@linux.vnet.ibm.com&gt;
Signed-off-by: Dave Kleikamp &lt;shaggy@linux.vnet.ibm.com&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Use names rather than numbers for SPRGs (v2)</title>
<updated>2009-08-20T00:12:27+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2009-07-14T20:52:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ee43eb788b3a06425fffb912677e2e1c8b00dd3b'/>
<id>ee43eb788b3a06425fffb912677e2e1c8b00dd3b</id>
<content type='text'>
The kernel uses SPRG registers for various purposes, typically in
low level assembly code as scratch registers or to hold per-cpu
global infos such as the PACA or the current thread_info pointer.

We want to be able to easily shuffle the usage of those registers
as some implementations have specific constraints realted to some
of them, for example, some have userspace readable aliases, etc..
and the current choice isn't always the best.

This patch should not change any code generation, and replaces the
usage of SPRN_SPRGn everywhere in the kernel with a named replacement
and adds documentation next to the definition of the names as to
what those are used for on each processor family.

The only parts that still use the original numbers are bits of KVM
or suspend/resume code that just blindly needs to save/restore all
the SPRGs.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The kernel uses SPRG registers for various purposes, typically in
low level assembly code as scratch registers or to hold per-cpu
global infos such as the PACA or the current thread_info pointer.

We want to be able to easily shuffle the usage of those registers
as some implementations have specific constraints realted to some
of them, for example, some have userspace readable aliases, etc..
and the current choice isn't always the best.

This patch should not change any code generation, and replaces the
usage of SPRN_SPRGn everywhere in the kernel with a named replacement
and adds documentation next to the definition of the names as to
what those are used for on each processor family.

The only parts that still use the original numbers are bits of KVM
or suspend/resume code that just blindly needs to save/restore all
the SPRGs.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Add PTRACE_SINGLEBLOCK support</title>
<updated>2009-06-09T03:29:25+00:00</updated>
<author>
<name>Roland McGrath</name>
<email>roland@redhat.com</email>
</author>
<published>2009-05-28T21:26:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ec097c84dff17511f2693e6ef6c3064dfbf0a3af'/>
<id>ec097c84dff17511f2693e6ef6c3064dfbf0a3af</id>
<content type='text'>
Reworked by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;

This adds block-step support on powerpc, including a PTRACE_SINGLEBLOCK
request for ptrace.

The BookE implementation is tweaked to fire a single step after a
block step in order to mimmic the server behaviour.

Signed-off-by: Roland McGrath &lt;roland@redhat.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
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<pre>
Reworked by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;

This adds block-step support on powerpc, including a PTRACE_SINGLEBLOCK
request for ptrace.

The BookE implementation is tweaked to fire a single step after a
block step in order to mimmic the server behaviour.

Signed-off-by: Roland McGrath &lt;roland@redhat.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge commit 'jwb/next' into next</title>
<updated>2009-03-03T02:30:03+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2009-03-03T02:30:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=652e8f8d579d61745094e36b4ff085026a332e73'/>
<id>652e8f8d579d61745094e36b4ff085026a332e73</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
</feed>
