linux-toradex.git/arch/powerpc/kernel/idle_e500.S, branch v4.9.13 Linux kernel for Apalis and Colibri modules powerpc/e500mc: Remove dead L2 flushing code in idle_e500.S 2015-06-03T02:37:19+00:00 Scott Wood scottwood@freescale.com 2015-04-07T03:00:38+00:00 86d63363defc0b2f22288b287f75837d48b561fc This code can never be executed as it is only built when CONFIG_PPC_E500MC is unset, but the only CPUs that have CPU_FTR_L2CSR require CONFIG_PPC_E500MC and do not have the MSR/HID0-based nap mechanism that this file uses. Signed-off-by: Scott Wood <scottwood@freescale.com> 
This code can never be executed as it is only built when
CONFIG_PPC_E500MC is unset, but the only CPUs that have CPU_FTR_L2CSR
require CONFIG_PPC_E500MC and do not have the MSR/HID0-based nap
mechanism that this file uses.

Signed-off-by: Scott Wood <scottwood@freescale.com>
powerpc: Use CURRENT_THREAD_INFO instead of open coded assembly 2012-07-11T04:18:22+00:00 Stuart Yoder stuart.yoder@freescale.com 2012-07-05T04:41:35+00:00 9778b696a0188ad3b3524b383953ee73b31b7b68 Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> 
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
powerpc: e500mc: Fix: use CONFIG_PPC_E500MC in idle_e500.S 2011-10-12T04:23:24+00:00 Bharat Bhushan r65777@freescale.com 2011-10-11T05:56:08+00:00 e33ee8b6f473b33a41c281f5329d9d7b3bed8ff5 It is wrongly using undefined CONFIG_E500MC. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
It is wrongly using undefined CONFIG_E500MC.

Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/e500mc: Add support for the wait instruction in e500_idle 2011-06-27T13:36:15+00:00 Scott Wood scottwood@freescale.com 2011-06-22T23:10:30+00:00 ebf714ff37561331eb39963945d80bfc2a59e00f e500mc cannot doze or nap due to an erratum (as well as having a different mechanism than previous e500), but it has a "wait" instruction that is similar to doze. On 64-bit, due to the soft-irq-disable mechanism, the existing book3e_idle should be used instead. Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
e500mc cannot doze or nap due to an erratum (as well as having a
different mechanism than previous e500), but it has a "wait" instruction
that is similar to doze.

On 64-bit, due to the soft-irq-disable mechanism, the existing
book3e_idle should be used instead.

Signed-off-by: Vakul Garg <vakul@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc: Fix for getting CPU number in power_save_ppc32_restore() 2008-09-03T10:53:47+00:00 Kumar Gala galak@kernel.crashing.org 2008-08-26T02:08:56+00:00 7888bc2b4778fda267a6e6422c4497dba865a47a The calculation to get TI_CPU based off of SPRG3 was just plain wrong, meaning that we were getting garbage for the CPU number on 6xx/G3/G4 based SMP boxes in this code. Just offset off the stack pointer (to get to thread_info) like all the other references to TI_CPU do. This was pointed out by Chen Gong <G.Chen@freescale.com> [paulus@samba.org - use rlwinm r12,r11,... instead of rlwinm r12,r1,...; tophys()] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org> 
The calculation to get TI_CPU based off of SPRG3 was just plain wrong,
meaning that we were getting garbage for the CPU number on 6xx/G3/G4
based SMP boxes in this code.

Just offset off the stack pointer (to get to thread_info) like all the
other references to TI_CPU do.

This was pointed out by Chen Gong <G.Chen@freescale.com>

[paulus@samba.org - use rlwinm r12,r11,... instead of
 rlwinm r12,r1,...; tophys()]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
powerpc/e500mc: flush L2 on NAP for e500mc 2008-06-26T06:49:03+00:00 Kumar Gala galak@kernel.crashing.org 2008-06-19T14:40:31+00:00 aba11fc50c925bbd6fb25d54eae2f86277a3b107 If we have an L2CSR register (e500mc) we need to flush the L2 before going to nap. We use the HW flush mechanism provided in that register. The code reuses the CPU_FTR_604_PERF_MON bit as it is no longer used by any code in the kernel. Additionally we didn't reuse the exist L2CR feature bit as this is intended for the 7xxx L2CR register and L2CSR is part of the new Freescale "Book-E" registers. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
If we have an L2CSR register (e500mc) we need to flush the L2 before going
to nap.  We use the HW flush mechanism provided in that register.

The code reuses the CPU_FTR_604_PERF_MON bit as it is no longer used by
any code in the kernel.  Additionally we didn't reuse the exist L2CR
feature bit as this is intended for the 7xxx L2CR register and L2CSR
is part of the new Freescale "Book-E" registers.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
powerpc/85xx: add DOZE/NAP support for e500 core 2008-06-26T06:48:56+00:00 Kumar Gala galak@kernel.crashing.org 2008-06-18T21:26:52+00:00 fc4033b2f8b1482022bff3d05505a1b1631bb6de The e500 core enter DOZE/NAP power-saving modes when the core go to cpu_idle routine. The power management default running mode is DOZE, If the user echo 1 > /proc/sys/kernel/powersave-nap the system will change to NAP running mode. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
The e500 core enter DOZE/NAP power-saving modes when the core go to
cpu_idle routine.

The power management default running mode is DOZE, If the user

echo 1 > /proc/sys/kernel/powersave-nap

the system will change to NAP running mode.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>