The alignment exception used to only check the exception table for
-EFAULT, not for other errors. That opens an oops window if we can
coerce the kernel into getting an alignment exception for other reasons
in what would normally be a user-protected accessor, which can be done
via some of the futex ops. This fixes it by always checking the
exception tables.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Chris Wright <chrisw@sous-sol.org>

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
  [POWERPC] Fix G5 DART (IOMMU) race causing occasional data corruption
  [POWERPC] Fix MMIO ops to provide expected barrier behaviour
  [POWERPC] Fix interrupt clearing in kdump shutdown sequence
  [POWERPC] update prep_defconfig
  [POWERPC] kdump: Support kernels having 64k page size.
  [POWERPC] Implement PowerPC futex_atomic_cmpxchg_inatomic().
  [POWERPC] Add new, missing argument to of_irq_map_raw() for 86xx.
  [POWERPC] Update defconfigs

This changes the writeX family of functions to have a sync instruction
before the MMIO store rather than after, because the generally expected
behaviour is that the device receiving the MMIO store can be guaranteed
to see the effects of any preceding writes to normal memory.

To preserve ordering between writeX and readX, and to preserve ordering
between preceding stores and the readX, the readX family of functions
have had an sync added before the load.

Although writeX followed by spin_unlock is not officially guaranteed
to keep the writeX inside the spin-locked region unless an mmiowb()
is used, there are currently drivers that depend on the previous
behaviour on powerpc, which was that the mmiowb wasn't actually required.
Therefore we have a per-cpu flag that is set by writeX, cleared by
__raw_spin_lock and mmiowb, and tested by __raw_spin_unlock.  If it is
set, __raw_spin_unlock does a sync and clears it.

This changes both 32-bit and 64-bit readX/writeX.  32-bit already has a
sync in __raw_spin_unlock (since lwsync doesn't exist on 32-bit), and thus
doesn't need the per-cpu flag.

Tested on G5 (PPC970) and POWER5.

Signed-off-by: Paul Mackerras <paulus@samba.org>

Call chip->eoi(irq) to clear any pending interrupt in case of kdump
shutdown sequence.  chip->end(irq) does not serve this purpose.

Signed-off-by: Mohan Kumar M <mohan@in.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>

add support for AUDIT_PERM predicate

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
  [POWERPC] Fix return value from memcpy
  [POWERPC] iseries: Define insw et al. so libata/ide will compile
  [POWERPC] Fix irq enable/disable in smp_generic_take_timebase
  [POWERPC] Fix problem with time not advancing on 32-bit platforms
  [POWERPC] Restore copyright notice in arch/powerpc/kernel/fpu.S
  [POWERPC] Fix up ibm_architecture_vec definition
  [POWERPC] Make OF irq map code detect more error cases
  [POWERPC] Support for "weird" MPICs and fixup mpc7448_hpc2
  [POWERPC] Fix MPIC sense codes in documentation
  [POWERPC] Fix performance regression in IRQ radix tree locking
  [POWERPC] Add mpc7448hpc2 device tree source file
  [POWERPC] Add MPC8349E MDS device tree source file to arch/powerpc/boot/dts
  [POWERPC] modify mpc83xx platforms to use new IRQ layer
  [POWERPC] Adapt ipic driver to new host_ops interface, add set_irq_type to set IRQ sense
  [POWERPC] back up old school ipic.[hc] to arch/ppc
  [POWERPC] Use mpc8641hpcn PIC base address from dev tree.
  [POWERPC] Allow MPC8641 HPCN to build with CONFIG_PCI disabled too.
  [POWERPC] Fix powerpc 44x_mmu build
  [POWERPC] Remove flush_dcache_all export

This fixes a hang on ppc32.

The problem was that I was comparing a 32-bit quantity with a 64-bit
quantity, and consequently time wasn't advancing.  This makes us use a
64-bit quantity on all platforms, which ends up simplifying the code
since we can now get rid of the tb_last_stamp variable (which actually
fixes another bug that Ben H and I noticed while going carefully through
the code).

This works fine on my G4 tibook.  Let me know how it goes on your
machines.

Acked-by: Olaf Hering <olaf@aepfle.de>
Acked-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

Eran Ben-Avi <eranpublic@yahoo.com> pointed out that the arch/ppc version
of smp_generic_take_timebase disables interrupts on entry but exits without
restoring them.  However, both it and the arch/powerpc version have another
problem, which is that they use local_irq_disable/enable rather than
local_irq_save/restore, and they are called with interrupts disabled.

This fixes both problems; it changes a return to a break in the arch/ppc
version, and changes both versions to use local_irq_save/restore.

Signed-off-by: Paul Mackerras <paulus@samba.org>