<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/powerpc/sysdev/Kconfig, branch v4.12-rc6</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>powerpc/xive: Native exploitation of the XIVE interrupt controller</title>
<updated>2017-04-10T11:41:34+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2017-04-05T07:54:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=243e25112d06b348f087a6f7aba4bbc288285bdd'/>
<id>243e25112d06b348f087a6f7aba4bbc288285bdd</id>
<content type='text'>
The XIVE interrupt controller is the new interrupt controller
found in POWER9. It supports advanced virtualization capabilities
among other things.

Currently we use a set of firmware calls that simulate the old
"XICS" interrupt controller but this is fairly inefficient.

This adds the framework for using XIVE along with a native
backend which OPAL for configuration. Later, a backend allowing
the use in a KVM or PowerVM guest will also be provided.

This disables some fast path for interrupts in KVM when XIVE is
enabled as these rely on the firmware emulation code which is no
longer available when the XIVE is used natively by Linux.

A latter patch will make KVM also directly exploit the XIVE, thus
recovering the lost performance (and more).

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
[mpe: Fixup pr_xxx("XIVE:"...), don't split pr_xxx() strings,
 tweak Kconfig so XIVE_NATIVE selects XIVE and depends on POWERNV,
 fix build errors when SMP=n, fold in fixes from Ben:
   Don't call cpu_online() on an invalid CPU number
   Fix irq target selection returning out of bounds cpu#
   Extra sanity checks on cpu numbers
 ]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The XIVE interrupt controller is the new interrupt controller
found in POWER9. It supports advanced virtualization capabilities
among other things.

Currently we use a set of firmware calls that simulate the old
"XICS" interrupt controller but this is fairly inefficient.

This adds the framework for using XIVE along with a native
backend which OPAL for configuration. Later, a backend allowing
the use in a KVM or PowerVM guest will also be provided.

This disables some fast path for interrupts in KVM when XIVE is
enabled as these rely on the firmware emulation code which is no
longer available when the XIVE is used natively by Linux.

A latter patch will make KVM also directly exploit the XIVE, thus
recovering the lost performance (and more).

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
[mpe: Fixup pr_xxx("XIVE:"...), don't split pr_xxx() strings,
 tweak Kconfig so XIVE_NATIVE selects XIVE and depends on POWERNV,
 fix build errors when SMP=n, fold in fixes from Ben:
   Don't call cpu_online() on an invalid CPU number
   Fix irq target selection returning out of bounds cpu#
   Extra sanity checks on cpu numbers
 ]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/rcpm: add RCPM driver</title>
<updated>2016-03-05T05:50:27+00:00</updated>
<author>
<name>chenhui zhao</name>
<email>chenhui.zhao@freescale.com</email>
</author>
<published>2015-11-20T09:13:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d17799f9c10e283cccd4d598d3416e6fac336ab9'/>
<id>d17799f9c10e283cccd4d598d3416e6fac336ab9</id>
<content type='text'>
There is a RCPM (Run Control/Power Management) in Freescale QorIQ
series processors. The device performs tasks associated with device
run control and power management.

The driver implements some features: mask/unmask irq, enter/exit low
power states, freeze time base, etc.

Signed-off-by: Chenhui Zhao &lt;chenhui.zhao@freescale.com&gt;
Signed-off-by: Tang Yuantian &lt;Yuantian.Tang@freescale.com&gt;
[scottwood: remove __KERNEL__ ifdef]
Signed-off-by: Scott Wood &lt;oss@buserror.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is a RCPM (Run Control/Power Management) in Freescale QorIQ
series processors. The device performs tasks associated with device
run control and power management.

The driver implements some features: mask/unmask irq, enter/exit low
power states, freeze time base, etc.

Signed-off-by: Chenhui Zhao &lt;chenhui.zhao@freescale.com&gt;
Signed-off-by: Tang Yuantian &lt;Yuantian.Tang@freescale.com&gt;
[scottwood: remove __KERNEL__ ifdef]
Signed-off-by: Scott Wood &lt;oss@buserror.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Added PCI MSI support using the HSTA module</title>
<updated>2014-04-30T22:26:30+00:00</updated>
<author>
<name>Alistair Popple</name>
<email>alistair@popple.id.au</email>
</author>
<published>2014-03-06T03:52:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e2c37d908336dc27c8b405f063c2a163124947fa'/>
<id>e2c37d908336dc27c8b405f063c2a163124947fa</id>
<content type='text'>
The PPC476GTR SoC supports message signalled interrupts (MSI) by writing
to special addresses within the High Speed Transfer Assist (HSTA) module.

This patch adds support for PCI MSI with a new system device. The DMA
window is also updated to allow access to the entire 42-bit address range
to allow PCI devices write access to the HSTA module.

Signed-off-by: Alistair Popple &lt;alistair@popple.id.au&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The PPC476GTR SoC supports message signalled interrupts (MSI) by writing
to special addresses within the High Speed Transfer Assist (HSTA) module.

This patch adds support for PCI MSI with a new system device. The DMA
window is also updated to allow access to the entire 42-bit address range
to allow PCI devices write access to the HSTA module.

Signed-off-by: Alistair Popple &lt;alistair@popple.id.au&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/powernv: Replace CONFIG_POWERNV_MSI with just CONFIG_PPC_POWERNV</title>
<updated>2013-12-02T03:16:39+00:00</updated>
<author>
<name>Michael Ellerman</name>
<email>michael@ellerman.id.au</email>
</author>
<published>2013-09-26T07:52:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=66c29da6782b9861b17f9fc81746e30315e039c2'/>
<id>66c29da6782b9861b17f9fc81746e30315e039c2</id>
<content type='text'>
We currently have a user visible CONFIG_POWERNV_MSI option, but it
doesn't actually disable MSI for powernv. The MSI code is always built,
what it does disable is the inclusion of the MSI bitmap code, which
leads to a build error.

eg, with PPC_POWERNV=y and POWERNV_MSI=n we get:

  arch/powerpc/platforms/built-in.o: In function `.pnv_teardown_msi_irqs':
  pci.c:(.text+0x3558): undefined reference to `.msi_bitmap_free_hwirqs'

We don't really need a POWERNV_MSI symbol, just have the MSI bitmap code
depend directly on PPC_POWERNV.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Reviewed-by: Gavin Shan &lt;shangw@linux.vnet.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We currently have a user visible CONFIG_POWERNV_MSI option, but it
doesn't actually disable MSI for powernv. The MSI code is always built,
what it does disable is the inclusion of the MSI bitmap code, which
leads to a build error.

eg, with PPC_POWERNV=y and POWERNV_MSI=n we get:

  arch/powerpc/platforms/built-in.o: In function `.pnv_teardown_msi_irqs':
  pci.c:(.text+0x3558): undefined reference to `.msi_bitmap_free_hwirqs'

We don't really need a POWERNV_MSI symbol, just have the MSI bitmap code
depend directly on PPC_POWERNV.

Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Reviewed-by: Gavin Shan &lt;shangw@linux.vnet.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/scom: CONFIG_SCOM_DEBUGFS should depend on CONFIG_DEBUG_FS</title>
<updated>2013-10-11T05:53:49+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2013-08-29T06:58:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4777f79689bc722d12b3cfa1e2e92809cbe7bb38'/>
<id>4777f79689bc722d12b3cfa1e2e92809cbe7bb38</id>
<content type='text'>
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/powernv: Add option CONFIG_POWERNV_MSI</title>
<updated>2013-04-26T06:09:58+00:00</updated>
<author>
<name>Gavin Shan</name>
<email>shangw@linux.vnet.ibm.com</email>
</author>
<published>2013-04-25T19:20:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a486bdb0e9da8d876d6ff4efc3138d35e141c0b5'/>
<id>a486bdb0e9da8d876d6ff4efc3138d35e141c0b5</id>
<content type='text'>
As Michael Ellerman suggested, to add CONFIG_POWERNV_MSI for PowerNV
platform. That's similar to CONFIG_PSERIES_MSI for pSeries platform.
For now, we don't make it dependent on CONFIG_EEH since it's not ready
to enable that yet.

Apart from that, we also enable CONFIG_PPC_MSI_BITMAP on selecting
CONFIG_POWERNV_MSI.

Signed-off-by: Gavin Shan &lt;shangw@linux.vnet.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As Michael Ellerman suggested, to add CONFIG_POWERNV_MSI for PowerNV
platform. That's similar to CONFIG_PSERIES_MSI for pSeries platform.
For now, we don't make it dependent on CONFIG_EEH since it's not ready
to enable that yet.

Apart from that, we also enable CONFIG_PPC_MSI_BITMAP on selecting
CONFIG_POWERNV_MSI.

Signed-off-by: Gavin Shan &lt;shangw@linux.vnet.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/powernv: Fix missing Kconfig dependency for MSIs</title>
<updated>2013-04-24T05:15:33+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2013-04-24T05:15:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6263fb3bd79834411e41acb8b02153e034ab810d'/>
<id>6263fb3bd79834411e41acb8b02153e034ab810d</id>
<content type='text'>
We need PPC_MSI_BITMAP support

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We need PPC_MSI_BITMAP support

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Move GE PIC drivers</title>
<updated>2012-03-16T16:08:11+00:00</updated>
<author>
<name>Martyn Welch</name>
<email>martyn.welch@ge.com</email>
</author>
<published>2012-03-12T17:12:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=44b24b74abc37e3c0f28c8288178056f10074863'/>
<id>44b24b74abc37e3c0f28c8288178056f10074863</id>
<content type='text'>
Move the GE PIC drivers to allow these to be used by non-86xx boards.

Signed-off-by: Martyn Welch &lt;martyn.welch@ge.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move the GE PIC drivers to allow these to be used by non-86xx boards.

Signed-off-by: Martyn Welch &lt;martyn.welch@ge.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc/4xx: Adding PCIe MSI support</title>
<updated>2011-05-26T05:00:37+00:00</updated>
<author>
<name>Rupjyoti Sarmah</name>
<email>rsarmah@amcc.com</email>
</author>
<published>2011-03-29T23:10:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3fb7933850faf1017c59a675e895ed8f27fef4be'/>
<id>3fb7933850faf1017c59a675e895ed8f27fef4be</id>
<content type='text'>
This patch adds MSI support for 440SPe, 460Ex, 460Sx and 405Ex.

Signed-off-by: Rupjyoti Sarmah &lt;rsarmah@apm.com&gt;
Signed-off-by: Tirumala R Marri &lt;tmarri@apm.com&gt;
Acked-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds MSI support for 440SPe, 460Ex, 460Sx and 405Ex.

Signed-off-by: Rupjyoti Sarmah &lt;rsarmah@apm.com&gt;
Signed-off-by: Tirumala R Marri &lt;tmarri@apm.com&gt;
Acked-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: Add SCOM infrastructure</title>
<updated>2011-04-20T07:01:19+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2011-04-14T22:31:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ab814b938d1d372bd2ac6268c15d4e0e6a5245c4'/>
<id>ab814b938d1d372bd2ac6268c15d4e0e6a5245c4</id>
<content type='text'>
SCOM is a side-band configuration bus implemented on some processors.
This code provides a way for code to map and operate on devices via
SCOM, while the details of how that is implemented is left up to a
SCOM "controller" in the platform code.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
SCOM is a side-band configuration bus implemented on some processors.
This code provides a way for code to map and operate on devices via
SCOM, while the details of how that is implemented is left up to a
SCOM "controller" in the platform code.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
