linux-toradex.git/arch/powerpc/sysdev/Makefile, branch v3.10.2

powerpc: Add an in memory udbg console

2013-05-07T20:36:49+00:00

This patch adds a new udbg early debug console which utilises
statically defined input and output buffers stored within the kernel
BSS. It is primarily designed to assist with bring up of new hardware
which may not have a working console but which has a method of
reading/writing kernel memory.

This version incorporates comments made by Ben H (thanks!).

Changes from v1:
	- Add memory barriers.
	- Ensure updating of read/write positions is atomic.

Signed-off-by: Alistair Popple 
Signed-off-by: Benjamin Herrenschmidt

Merge remote-tracking branch 'agust/next' into next

2013-02-20T00:39:05+00:00

<<
Please pull mpc5xxx patches for v3.9. The bestcomm driver is
moved to drivers/dma (so it will be usable for ColdFire).
mpc5121 now provides common dtsi file and existing mpc5121 device
trees use it. There are some minor clock init and sparse fixes
and updates for various 5200 device tree files from Grant. Some
fixes for bugs in the mpc5121 DIU driver are also included here
(Andrew Morton suggested to push them via my mpc5xxx tree).
>>

powerpc: Build kernel with -mcmodel=medium

2013-01-10T06:00:31+00:00

Finally remove the two level TOC and build with -mcmodel=medium.

Unfortunately we can't build modules with -mcmodel=medium due to
the tricks the kernel module loader plays with percpu data:

# -mcmodel=medium breaks modules because it uses 32bit offsets from
# the TOC pointer to create pointers where possible. Pointers into the
# percpu data area are created by this method.
#
# The kernel module loader relocates the percpu data section from the
# original location (starting with 0xd...) to somewhere in the base
# kernel percpu data space (starting with 0xc...). We need a full
# 64bit relocation for this to work, hence -mcmodel=large.

On older kernels we fall back to the two level TOC (-mminimal-toc)

Signed-off-by: Anton Blanchard 
Signed-off-by: Benjamin Herrenschmidt

powerpc/44x: Support OCM(On Chip Memory) for APM821xx SoC and Bluestone board

2013-01-10T04:08:37+00:00

This patch consists of:
- Add driver for OCM component
- Export OCM Information at /sys/kernel/debug/ppc4xx_ocm/info

Signed-off-by: Vinh Nguyen Huu Tuong 
Acked-by: Josh Boyer 
Signed-off-by: Benjamin Herrenschmidt

powerpc, dma: move bestcomm driver from arch/powerpc/sysdev to drivers/dma

2013-01-03T14:41:20+00:00

The bestcomm dma hardware, and some of its users like the FEC ethernet
component, is used in different FreeScale parts, including non-powerpc
parts like the ColdFire MCF547x & MCF548x families.  Don't keep the
driver hidden in arch/powerpc where it is inaccessible for other arches.
.c files are moved to drivers/dma/bestcomm, while .h files are moved to
include/linux/fsl/bestcomm.  Makefiles, Kconfigs and #include directives
are updated for the new file locations.

Tested by recompiling for MPC5200 with all bestcomm users enabled.

Signed-off-by: Philippe De Muyter 
Signed-off-by: Anatolij Gustschin

powerpc/mpic: FSL MPIC error interrupt support.

2012-09-12T19:57:10+00:00

All SOC device error interrupts are muxed and delivered to the core
as a single MPIC error interrupt. Currently all the device drivers
requiring access to device errors have to register for the MPIC error
interrupt as a shared interrupt.

With this patch we add interrupt demuxing capability in the mpic driver,
allowing device drivers to register for their individual error interrupts.
This is achieved by handling error interrupts in a cascaded fashion.

MPIC error interrupt is handled by the "error_int_handler", which
subsequently demuxes it using the EISR and delivers it to the respective
drivers.

The error interrupt capability is dependent on the MPIC EIMR register,
which was introduced in FSL MPIC version 4.1 (P4080 rev2). So, error
interrupt demuxing capability is dependent on the MPIC version and can
be used for versions >= 4.1.

Signed-off-by: Varun Sethi 
Signed-off-by: Bogdan Hamciuc 
Signed-off-by: Kumar Gala

powerpc: add support for MPIC message register API

2012-03-16T21:15:28+00:00

Some MPIC implementations contain one or more blocks of message registers
that are used to send messages between cores via IPIs.  A simple API has
been added to access (get/put, read, write, etc ...) these message registers.
The available message registers are initially discovered via nodes in the
device tree.  A separate commit contains a binding for the message register
nodes.

Signed-off-by: Meador Inge 
Signed-off-by: Jia Hongtao 
Signed-off-by: Li Yang 
Signed-off-by: Kumar Gala

powerpc: Move GE PIC drivers

2012-03-16T16:08:11+00:00

Move the GE PIC drivers to allow these to be used by non-86xx boards.

Signed-off-by: Martyn Welch 
Signed-off-by: Kumar Gala

powerpc/fsl: Add support for Integrated Flash Controller

2012-01-04T21:41:22+00:00

Integrated Flash Controller supports various flashes like NOR, NAND
and other devices using NOR, NAND and GPCM Machine available on it.
IFC supports four chip selects.

Signed-off-by: Dipen Dudhat 
Signed-off-by: Scott Wood 
Signed-off-by: Li Yang 
Signed-off-by: Liu Shuo 
Signed-off-by: Prabhakar Kushwaha 
Signed-off-by: Kumar Gala

fsl-rio: Split rio driver into two parts, RapidIO endpoint and message unit

2011-11-24T08:01:34+00:00

The Freescale PowerPC RapidIO controller consists of a RapidIO endpoint and
a RapidIO message unit(RMU). Or use RapidIO message manager(RMan) to
replace the RMU in DPAA architecture. Therefore, we should split the code
into two function modules according to the hardware architecture. Add new
struct for RMU module, and new initialization function to set up RMU
module. This policy is very conducive to adding new module like RMan, or
adding multi-ports or message units support.

Signed-off-by: Lian Minghuan 
Signed-off-by: Liu Gang 
Acked-by: Alexandre Bounine 
Signed-off-by: Kumar Gala