<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/ppc/kernel/misc.S, branch v2.6.23.17</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>[POWERPC] Fix small race in 44x tlbie function</title>
<updated>2007-08-15T05:12:50+00:00</updated>
<author>
<name>David Gibson</name>
<email>david@gibson.dropbear.id.au</email>
</author>
<published>2007-08-07T04:20:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=aa1cf632bd6f998cb4567ccf1a9d2e5daaa9fb44'/>
<id>aa1cf632bd6f998cb4567ccf1a9d2e5daaa9fb44</id>
<content type='text'>
The 440 family of processors don't have a tlbie instruction.  So, we
implement TLB invalidates by explicitly searching the TLB with tlbsx.,
then clobbering the relevant entry, if any.  Unfortunately the PID for
the search needs to be stored in the MMUCR register, which is also
used by the TLB miss handler.  Interrupts were enabled in _tlbie(), so
an interrupt between loading the MMUCR and the tlbsx could cause
incorrect search results, and thus a failure to invalide TLB entries
which needed to be invalidated.

This fixes the problem in both arch/ppc and arch/powerpc by inhibiting
interrupts (even critical and debug interrupts) across the relevant
instructions.

Signed-off-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Acked-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The 440 family of processors don't have a tlbie instruction.  So, we
implement TLB invalidates by explicitly searching the TLB with tlbsx.,
then clobbering the relevant entry, if any.  Unfortunately the PID for
the search needs to be stored in the MMUCR register, which is also
used by the TLB miss handler.  Interrupts were enabled in _tlbie(), so
an interrupt between loading the MMUCR and the tlbsx could cause
incorrect search results, and thus a failure to invalide TLB entries
which needed to be invalidated.

This fixes the problem in both arch/ppc and arch/powerpc by inhibiting
interrupts (even critical and debug interrupts) across the relevant
instructions.

Signed-off-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Acked-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Merge CPU features pertaining to icache coherency</title>
<updated>2007-06-14T12:30:16+00:00</updated>
<author>
<name>David Gibson</name>
<email>david@gibson.dropbear.id.au</email>
</author>
<published>2007-06-13T04:52:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4508dc21feb189159d4cc1d5b79c5a55fad5f2ed'/>
<id>4508dc21feb189159d4cc1d5b79c5a55fad5f2ed</id>
<content type='text'>
Currently the powerpc kernel has a 64-bit only feature,
COHERENT_ICACHE used for those CPUS which maintain icache/dcache
coherency in hardware (POWER5, essentially).  It also has a feature,
SPLIT_ID_CACHE, which is used on CPUs which have separate i and
d-caches, which is to say everything except 601 and Freescale E200.

In nearly all the places we check the SPLIT_ID_CACHE, what we actually
care about is whether the i and d-caches are coherent (which they will
be, trivially, if they're the same cache).

This tries to clarify the situation a little.  The COHERENT_ICACHE
feature becomes availble on 32-bit and is set for all CPUs where i and
d-cache are effectively coherent, whether this is due to special logic
(POWER5) or because they're unified.  We check this, instead of
SPLIT_ID_CACHE nearly everywhere.

The SPLIT_ID_CACHE feature itself is replaced by a UNIFIED_ID_CACHE
feature with reversed sense, set only on 601 and Freescale E200.  In
the two places (one Freescale BookE specific) where we really care
whether it's a unified cache, not whether they're coherent, we check
this feature.  The CPUs with unified cache are so few, we could
consider replacing this feature bit with explicit checks against the
PVR.

This will make unifying the 32-bit and 64-bit cache flush code a
little more straightforward.

Signed-off-by: David Gibson &lt;dwg@au1.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently the powerpc kernel has a 64-bit only feature,
COHERENT_ICACHE used for those CPUS which maintain icache/dcache
coherency in hardware (POWER5, essentially).  It also has a feature,
SPLIT_ID_CACHE, which is used on CPUs which have separate i and
d-caches, which is to say everything except 601 and Freescale E200.

In nearly all the places we check the SPLIT_ID_CACHE, what we actually
care about is whether the i and d-caches are coherent (which they will
be, trivially, if they're the same cache).

This tries to clarify the situation a little.  The COHERENT_ICACHE
feature becomes availble on 32-bit and is set for all CPUs where i and
d-cache are effectively coherent, whether this is due to special logic
(POWER5) or because they're unified.  We check this, instead of
SPLIT_ID_CACHE nearly everywhere.

The SPLIT_ID_CACHE feature itself is replaced by a UNIFIED_ID_CACHE
feature with reversed sense, set only on 601 and Freescale E200.  In
the two places (one Freescale BookE specific) where we really care
whether it's a unified cache, not whether they're coherent, we check
this feature.  The CPUs with unified cache are so few, we could
consider replacing this feature bit with explicit checks against the
PVR.

This will make unifying the 32-bit and 64-bit cache flush code a
little more straightforward.

Signed-off-by: David Gibson &lt;dwg@au1.ibm.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Consolidate feature fixup code</title>
<updated>2006-10-25T01:42:10+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2006-10-24T06:42:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=42c4aaadb737e0e672b3fb86b2c41ff59f0fb8bc'/>
<id>42c4aaadb737e0e672b3fb86b2c41ff59f0fb8bc</id>
<content type='text'>
There are currently two versions of the functions for applying the
feature fixups, one for CPU features and one for firmware features. In
addition, they are both in assembly and with separate implementations
for 32 and 64 bits. identify_cpu() is also implemented in assembly and
separately for 32 and 64 bits.

This patch replaces them with a pair of C functions. The call sites are
slightly moved on ppc64 as well to be called from C instead of from
assembly, though it's a very small change, and thus shouldn't cause any
problem.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are currently two versions of the functions for applying the
feature fixups, one for CPU features and one for firmware features. In
addition, they are both in assembly and with separate implementations
for 32 and 64 bits. identify_cpu() is also implemented in assembly and
separately for 32 and 64 bits.

This patch replaces them with a pair of C functions. The call sites are
slightly moved on ppc64 as well to be called from C instead of from
assembly, though it's a very small change, and thus shouldn't cause any
problem.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] provide kernel_execve on all architectures</title>
<updated>2006-10-02T14:57:23+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2006-10-02T09:18:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fe74290d51bc08e9b90ed7c145d74a22cd50b90e'/>
<id>fe74290d51bc08e9b90ed7c145d74a22cd50b90e</id>
<content type='text'>
This adds the new kernel_execve function on all architectures that were using
_syscall3() to implement execve.

The implementation uses code from the _syscall3 macros provided in the
unistd.h header file.  I don't have cross-compilers for any of these
architectures, so the patch is untested with the exception of i386.

Most architectures can probably implement this in a nicer way in assembly or
by combining it with the sys_execve implementation itself, but this should do
it for now.

[bunk@stusta.de: m68knommu build fix]
[markh@osdl.org: build fix]
[bero@arklinux.org: build fix]
[ralf@linux-mips.org: mips fix]
[schwidefsky@de.ibm.com: s390 fix]
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Andi Kleen &lt;ak@muc.de&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Richard Henderson &lt;rth@twiddle.net&gt;
Cc: Ivan Kokshaysky &lt;ink@jurassic.park.msu.ru&gt;
Cc: Russell King &lt;rmk@arm.linux.org.uk&gt;
Cc: Ian Molton &lt;spyro@f2s.com&gt;
Cc: Mikael Starvik &lt;starvik@axis.com&gt;
Cc: David Howells &lt;dhowells@redhat.com&gt;
Cc: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Cc: Hirokazu Takata &lt;takata.hirokazu@renesas.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
Cc: Heiko Carstens &lt;heiko.carstens@de.ibm.com&gt;
Cc: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;
Cc: Paul Mundt &lt;lethal@linux-sh.org&gt;
Cc: Kazumoto Kojima &lt;kkojima@rr.iij4u.or.jp&gt;
Cc: Richard Curnow &lt;rc@rc0.org.uk&gt;
Cc: William Lee Irwin III &lt;wli@holomorphy.com&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Jeff Dike &lt;jdike@addtoit.com&gt;
Cc: Paolo 'Blaisorblade' Giarrusso &lt;blaisorblade@yahoo.it&gt;
Cc: Miles Bader &lt;uclinux-v850@lsi.nec.co.jp&gt;
Cc: Chris Zankel &lt;chris@zankel.net&gt;
Cc: "Luck, Tony" &lt;tony.luck@intel.com&gt;
Cc: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Cc: Roman Zippel &lt;zippel@linux-m68k.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Bernhard Rosenkraenzer &lt;bero@arklinux.org&gt;
Signed-off-by: Mark Haverkamp &lt;markh@osdl.org&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds the new kernel_execve function on all architectures that were using
_syscall3() to implement execve.

The implementation uses code from the _syscall3 macros provided in the
unistd.h header file.  I don't have cross-compilers for any of these
architectures, so the patch is untested with the exception of i386.

Most architectures can probably implement this in a nicer way in assembly or
by combining it with the sys_execve implementation itself, but this should do
it for now.

[bunk@stusta.de: m68knommu build fix]
[markh@osdl.org: build fix]
[bero@arklinux.org: build fix]
[ralf@linux-mips.org: mips fix]
[schwidefsky@de.ibm.com: s390 fix]
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Andi Kleen &lt;ak@muc.de&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Richard Henderson &lt;rth@twiddle.net&gt;
Cc: Ivan Kokshaysky &lt;ink@jurassic.park.msu.ru&gt;
Cc: Russell King &lt;rmk@arm.linux.org.uk&gt;
Cc: Ian Molton &lt;spyro@f2s.com&gt;
Cc: Mikael Starvik &lt;starvik@axis.com&gt;
Cc: David Howells &lt;dhowells@redhat.com&gt;
Cc: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Cc: Hirokazu Takata &lt;takata.hirokazu@renesas.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Kyle McMartin &lt;kyle@mcmartin.ca&gt;
Cc: Heiko Carstens &lt;heiko.carstens@de.ibm.com&gt;
Cc: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;
Cc: Paul Mundt &lt;lethal@linux-sh.org&gt;
Cc: Kazumoto Kojima &lt;kkojima@rr.iij4u.or.jp&gt;
Cc: Richard Curnow &lt;rc@rc0.org.uk&gt;
Cc: William Lee Irwin III &lt;wli@holomorphy.com&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Jeff Dike &lt;jdike@addtoit.com&gt;
Cc: Paolo 'Blaisorblade' Giarrusso &lt;blaisorblade@yahoo.it&gt;
Cc: Miles Bader &lt;uclinux-v850@lsi.nec.co.jp&gt;
Cc: Chris Zankel &lt;chris@zankel.net&gt;
Cc: "Luck, Tony" &lt;tony.luck@intel.com&gt;
Cc: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Cc: Roman Zippel &lt;zippel@linux-m68k.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Bernhard Rosenkraenzer &lt;bero@arklinux.org&gt;
Signed-off-by: Mark Haverkamp &lt;markh@osdl.org&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] clean up ide io accessors</title>
<updated>2006-09-20T04:06:18+00:00</updated>
<author>
<name>Stephen Rothwell</name>
<email>sfr@canb.auug.org.au</email>
</author>
<published>2006-09-19T07:30:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=73ea9e1bcb8eea4f3b2052fe7ccd7ee4b5a271a0'/>
<id>73ea9e1bcb8eea4f3b2052fe7ccd7ee4b5a271a0</id>
<content type='text'>
Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] remove unused asm routines</title>
<updated>2006-09-20T04:06:18+00:00</updated>
<author>
<name>Stephen Rothwell</name>
<email>sfr@canb.auug.org.au</email>
</author>
<published>2006-09-19T06:52:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=661f1cdb8b3e3c2c44e97df122c1d5643c054ce8'/>
<id>661f1cdb8b3e3c2c44e97df122c1d5643c054ce8</id>
<content type='text'>
_insw, _outsw, _insl amd _outsl are all unused, so remove them.

Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
_insw, _outsw, _insl amd _outsl are all unused, so remove them.

Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Remove obsolete #include &lt;linux/config.h&gt;</title>
<updated>2006-06-30T17:25:36+00:00</updated>
<author>
<name>Jörn Engel</name>
<email>joern@wohnheim.fh-wedel.de</email>
</author>
<published>2006-06-30T17:25:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6ab3d5624e172c553004ecc862bfeac16d9d68b7'/>
<id>6ab3d5624e172c553004ecc862bfeac16d9d68b7</id>
<content type='text'>
Signed-off-by: Jörn Engel &lt;joern@wohnheim.fh-wedel.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Jörn Engel &lt;joern@wohnheim.fh-wedel.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc: Use the system call table from arch/powerpc/kernel/systbl.S</title>
<updated>2006-02-10T05:02:20+00:00</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@samba.org</email>
</author>
<published>2006-02-10T05:02:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8568daa49063fd84b52b9e22b4e2422417b4d483'/>
<id>8568daa49063fd84b52b9e22b4e2422417b4d483</id>
<content type='text'>
With this, new system calls only have to be wired up in one place
for ARCH=ppc and ARCH=powerpc, rather than 2.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With this, new system calls only have to be wired up in one place
for ARCH=ppc and ARCH=powerpc, rather than 2.

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] ppc: Remove powermac support from ARCH=ppc</title>
<updated>2006-01-15T06:30:44+00:00</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@samba.org</email>
</author>
<published>2006-01-15T06:30:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a7fdd90bc43e3e9cb08bc1b13650024d419b89e5'/>
<id>a7fdd90bc43e3e9cb08bc1b13650024d419b89e5</id>
<content type='text'>
This makes it possible to build kernels for PReP and/or CHRP
with ARCH=ppc by removing the (non-building) powermac support.
It's now also possible to select PReP and CHRP independently.
Powermac users should now build with ARCH=powerpc instead of
ARCH=ppc.  (This does mean that it is no longer possible to
build a 32-bit kernel for a G5.)

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This makes it possible to build kernels for PReP and/or CHRP
with ARCH=ppc by removing the (non-building) powermac support.
It's now also possible to select PReP and CHRP independently.
Powermac users should now build with ARCH=powerpc instead of
ARCH=ppc.  (This does mean that it is no longer possible to
build a 32-bit kernel for a G5.)

Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] ppc: Make ARCH=ppc build again with new syscall path</title>
<updated>2006-01-09T03:50:55+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>dwmw2@infradead.org</email>
</author>
<published>2005-11-26T14:44:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1c3eb629102bd4e327cc8b08fb9cdae4a985e841'/>
<id>1c3eb629102bd4e327cc8b08fb9cdae4a985e841</id>
<content type='text'>
This makes ARCH=ppc build in your powerpc tree again, with the new
syscall entry/exit path.

Still doesn't actually boot on my Pegasos; the last thing I see is
'MMU:exit'. But at least it builds -- I'll look at why it doesn't boot
later, so that I can see if the mv643xx_eth actually works with ARCH=ppc
(it doesn't with ARCH=powerpc; two in every three packets I receive are
offset by 4 bytes).

Signed-off-by: David Woodhouse &lt;dwmw2@infradead.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This makes ARCH=ppc build in your powerpc tree again, with the new
syscall entry/exit path.

Still doesn't actually boot on my Pegasos; the last thing I see is
'MMU:exit'. But at least it builds -- I'll look at why it doesn't boot
later, so that I can see if the mv643xx_eth actually works with ARCH=ppc
(it doesn't with ARCH=powerpc; two in every three packets I receive are
offset by 4 bytes).

Signed-off-by: David Woodhouse &lt;dwmw2@infradead.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
