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<title>linux-toradex.git/arch/riscv/kernel/module.c, branch v4.20</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>RISC-V: Silence some module warnings on 32-bit</title>
<updated>2018-11-13T02:12:24+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2018-10-31T06:47:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ef3a61406618291c46da168ff91acaa28d85944c'/>
<id>ef3a61406618291c46da168ff91acaa28d85944c</id>
<content type='text'>
Fixes:

arch/riscv/kernel/module.c: In function 'apply_r_riscv_32_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:23:27: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_pcrel_hi20_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:104:23: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_hi20_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:146:23: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_got_hi20_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:190:60: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_call_plt_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:214:24: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_call_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:236:23: note: format string is defined here

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
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<pre>
Fixes:

arch/riscv/kernel/module.c: In function 'apply_r_riscv_32_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:23:27: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_pcrel_hi20_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:104:23: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_hi20_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:146:23: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_got_hi20_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:190:60: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_call_plt_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:214:24: note: format string is defined here
arch/riscv/kernel/module.c: In function 'apply_r_riscv_call_rela':
./include/linux/kern_levels.h:5:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'Elf32_Addr' {aka 'unsigned int'} [-Wformat=]
arch/riscv/kernel/module.c:236:23: note: format string is defined here

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>RISC-V: Fix the rv32i kernel build</title>
<updated>2018-07-04T21:12:53+00:00</updated>
<author>
<name>Palmer Dabbelt</name>
<email>palmer@sifive.com</email>
</author>
<published>2018-07-04T21:12:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9a6a51154f8be90a76f6a8ea8809115c11cec9dd'/>
<id>9a6a51154f8be90a76f6a8ea8809115c11cec9dd</id>
<content type='text'>
These patches for building 32-bit RISC-V kernel.
 - Fix the compile errors and warnings on RV32I.
 - Fix some incompatible problem on RV32I.
 - Add format.h for compatible of print format.

The fixed width integer types format for Elf_Addr will move to
generic header by another patch. For now, there are some warning
about unexpected argument of type on RV32I.

Change in v1:
 - Fix some error in v1
 - Remove implementation of fixed width integer types format for Elf_Addr.
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These patches for building 32-bit RISC-V kernel.
 - Fix the compile errors and warnings on RV32I.
 - Fix some incompatible problem on RV32I.
 - Add format.h for compatible of print format.

The fixed width integer types format for Elf_Addr will move to
generic header by another patch. For now, there are some warning
about unexpected argument of type on RV32I.

Change in v1:
 - Fix some error in v1
 - Remove implementation of fixed width integer types format for Elf_Addr.
</pre>
</div>
</content>
</entry>
<entry>
<title>RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocations</title>
<updated>2018-07-04T21:12:34+00:00</updated>
<author>
<name>Andreas Schwab</name>
<email>schwab@suse.de</email>
</author>
<published>2018-06-12T17:26:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=781c8fe2da3d2c7c95cd7ffddbab63b80a79da4d'/>
<id>781c8fe2da3d2c7c95cd7ffddbab63b80a79da4d</id>
<content type='text'>
The R_RISCV_ADD32/R_RISCV_SUB32 relocations should add/subtract the
address of the symbol (without overflow check), not its contents.

Signed-off-by: Andreas Schwab &lt;schwab@suse.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
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<pre>
The R_RISCV_ADD32/R_RISCV_SUB32 relocations should add/subtract the
address of the symbol (without overflow check), not its contents.

Signed-off-by: Andreas Schwab &lt;schwab@suse.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>RISC-V: Change variable type for 32-bit compatible</title>
<updated>2018-07-04T20:56:52+00:00</updated>
<author>
<name>Zong Li</name>
<email>zong@andestech.com</email>
</author>
<published>2018-06-25T08:49:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7df85002178e708aa749c63020fd333d9f085ced'/>
<id>7df85002178e708aa749c63020fd333d9f085ced</id>
<content type='text'>
Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
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<pre>
Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>RISC-V: Handle R_RISCV_32 in modules</title>
<updated>2018-06-11T16:04:34+00:00</updated>
<author>
<name>Andreas Schwab</name>
<email>schwab@suse.de</email>
</author>
<published>2018-06-07T10:27:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=77aa85de16aeefd75d639737c7bfcf0d2604e471'/>
<id>77aa85de16aeefd75d639737c7bfcf0d2604e471</id>
<content type='text'>
With CONFIG_MODVERSIONS=y the R_RISCV_32 relocation is used by the
__kcrctab section.

Signed-off-by: Andreas Schwab &lt;schwab@suse.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
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<pre>
With CONFIG_MODVERSIONS=y the R_RISCV_32 relocation is used by the
__kcrctab section.

Signed-off-by: Andreas Schwab &lt;schwab@suse.de&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>RISC-V: Support SUB32 relocation type in kernel module</title>
<updated>2018-04-03T03:00:55+00:00</updated>
<author>
<name>Zong Li</name>
<email>zong@andestech.com</email>
</author>
<published>2018-03-15T08:50:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4aad074c9c1d1302c504e1a26fe434878fe08cd5'/>
<id>4aad074c9c1d1302c504e1a26fe434878fe08cd5</id>
<content type='text'>
Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>RISC-V: Support ADD32 relocation type in kernel module</title>
<updated>2018-04-03T03:00:55+00:00</updated>
<author>
<name>Zong Li</name>
<email>zong@andestech.com</email>
</author>
<published>2018-03-15T08:50:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8e691b16769d233f8a8b668dc7fad783459e4573'/>
<id>8e691b16769d233f8a8b668dc7fad783459e4573</id>
<content type='text'>
Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>RISC-V: Support ALIGN relocation type in kernel module</title>
<updated>2018-04-03T03:00:55+00:00</updated>
<author>
<name>Zong Li</name>
<email>zong@andestech.com</email>
</author>
<published>2018-03-15T08:50:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=29e405cd88c373ddcb3399687311aa869a7c8ee7'/>
<id>29e405cd88c373ddcb3399687311aa869a7c8ee7</id>
<content type='text'>
Just fail on align type. Kernel modules loader didn't do relax
like linker, it is difficult to remove or migrate the code,
but the remnant nop instructions harm the performaace of module.
We expect the building module with the no-relax option.

Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Just fail on align type. Kernel modules loader didn't do relax
like linker, it is difficult to remove or migrate the code,
but the remnant nop instructions harm the performaace of module.
We expect the building module with the no-relax option.

Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq</title>
<updated>2018-04-03T03:00:55+00:00</updated>
<author>
<name>Zong Li</name>
<email>zong@andestech.com</email>
</author>
<published>2018-03-15T08:50:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=56ea45ae239206d79d776a43bf32cbd8fa4e069d'/>
<id>56ea45ae239206d79d776a43bf32cbd8fa4e069d</id>
<content type='text'>
Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module</title>
<updated>2018-04-03T03:00:55+00:00</updated>
<author>
<name>Zong Li</name>
<email>zong@andestech.com</email>
</author>
<published>2018-03-15T08:50:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e7456e696bff09ef2345081bf21e5ce741e2a3ce'/>
<id>e7456e696bff09ef2345081bf21e5ce741e2a3ce</id>
<content type='text'>
HI20 and LO12_I/LO12_S relocate the absolute address, the range of
offset must in 32-bit.

Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
HI20 and LO12_I/LO12_S relocate the absolute address, the range of
offset must in 32-bit.

Signed-off-by: Zong Li &lt;zong@andestech.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</pre>
</div>
</content>
</entry>
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