linux-toradex.git/arch/riscv/kernel/sys_riscv.c, branch v5.0

RISC-V: Use a less ugly workaround for unused variable warnings

2018-08-28T19:58:36+00:00

Thanks to Christoph Hellwig for pointing out a cleaner way to do this,
as my approach was quite ugly.

CC: Christoph Hellwig 
Signed-off-by: Palmer Dabbelt

RISC-V: Define sys_riscv_flush_icache when SMP=n

2018-08-20T17:55:24+00:00

This would be necessary to make non-SMP builds work, but there is
another error in the implementation of our syscall linkage that actually
just causes sys_riscv_flush_icache to never build.  I've build tested
this on allnoconfig and allnoconfig+SMP=y, as well as defconfig like
normal.

CC: Christoph Hellwig 
CC: Guenter Roeck 
In-Reply-To: <20180809055830.GA17533@infradead.org>
In-Reply-To: <20180809132612.GA31058@roeck-us.net>
Signed-off-by: Palmer Dabbelt

mm: add ksys_mmap_pgoff() helper; remove in-kernel calls to sys_mmap_pgoff()

2018-04-02T18:16:11+00:00

Using this helper allows us to avoid the in-kernel calls to the
sys_mmap_pgoff() syscall. The ksys_ prefix denotes that this function is
meant as a drop-in replacement for the syscall. In particular, it uses the
same calling convention as sys_mmap_pgoff().

This patch is part of a series which removes in-kernel calls to syscalls.
On this basis, the syscall entry path can be streamlined. For details, see
http://lkml.kernel.org/r/20180325162527.GA17492@light.dominikbrodowski.net

Cc: Andrew Morton 
Cc: linux-mm@kvack.org
Signed-off-by: Dominik Brodowski

RISC-V: Logical vs Bitwise typo

2017-12-11T15:51:06+00:00

In the current code, there is a ! logical NOT where a bitwise ~ NOT was
intended.  It means that we never return -EINVAL.

Signed-off-by: Dan Carpenter 
Signed-off-by: Palmer Dabbelt

RISC-V: Clean up an unused include

2017-11-30T20:58:29+00:00

We used to have some cmpxchg syscalls.  They're no longer there, so we
no longer need the include.

CC: Christoph Hellwig 
Signed-off-by: Palmer Dabbelt

RISC-V: Allow userspace to flush the instruction cache

2017-11-30T20:58:29+00:00

Despite RISC-V having a direct 'fence.i' instruction available to
userspace (which we can't trap!), that's not actually viable when
running on Linux because the kernel might schedule a process on another
hart.  There is no way for userspace to handle this without invoking the
kernel (as it doesn't know the thread->hart mappings), so we've defined
a RISC-V specific system call to flush the instruction cache.

This patch adds both a system call and a VDSO entry.  If possible, we'd
like to avoid having the system call be considered part of the
user-facing ABI and instead restrict that to the VDSO entry -- both just
in general to avoid having additional user-visible ABI to maintain, and
because we'd prefer that users just call the VDSO entry because there
might be a better way to do this in the future (ie, one that doesn't
require entering the kernel).

Signed-off-by: Andrew Waterman 
Signed-off-by: Palmer Dabbelt

RISC-V: User-facing API

2017-09-26T22:26:48+00:00

This patch contains code that is in some way visible to the user:
including via system calls, the VDSO, module loading and signal
handling.  It also contains some generic code that is ABI visible.

Signed-off-by: Palmer Dabbelt