linux-toradex.git/arch/sh/drivers/pci, branch v3.0.2

SH: SE7751: Fix pcibios_map_platform_irq prototype.

2011-05-23T05:46:36+00:00

Signed-off-by: Ralf Baechle 
Signed-off-by: Paul Mundt

Fix common misspellings

2011-03-31T14:26:23+00:00

Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi

sh: Fix up async PCIe probing on SMP.

2011-01-28T06:14:08+00:00

For the SMP case we run in to a lockup without a full synchronization
prior to continuing with the boot.

Signed-off-by: Paul Mundt

sh: pci: Support asynchronous initialization of SH-X3 PCIe channels.

2011-01-18T10:56:04+00:00

SH-X3 controllers all have pretty dire delays needed for PHY wakeup, so
we attempt to mitigate the damage by bringing them up asynchronously,
simply using the synchronization points for persistent bridge to channel
numbering.

Signed-off-by: Paul Mundt

sh: pci: Add pci_fixup_pcic to pci of landisk

2011-01-11T03:47:17+00:00

This adds a pci setting revision for landisk.

Signed-off-by: Nobuhiro Iwamatsu 
Signed-off-by: Paul Mundt

sh: machvec IO death.

2010-11-01T13:49:04+00:00

This takes a bit of a sledgehammer to the machvec I/O routines. The
iomem case requires no special casing and so can just be dropped
outright. This only leaves the ioport casing for PCI and SuperIO
mangling. With the SuperIO case going through the standard ioport
mapping, it's possible to replace everything with generic routines.

With this done the standard I/O routines are tidied up and NO_IOPORT
now gets default-enabled for the vast majority of boards.

Signed-off-by: Paul Mundt

sh: pci: Convert to upper/lower_32_bits() helpers.

2010-10-14T21:15:56+00:00

Instead of hand-rolling our own, just use the generic ones instead.

Signed-off-by: Paul Mundt

sh: pci: Support secondary FPGA-driven PCIe clocks on SDK7786.

2010-10-13T23:44:55+00:00

The SDK7786 FPGA has secondary control over the PCIe clocks, specifically
relating to the slots and oscillator. This ties the FPGA clocks in to the
clock framework and balances the refcounting similar to how the primary
on-chip clocks are managed. While the on-chip clocks are per-port, the
FPGA clock enable/disable is global for the entire block.

Signed-off-by: Paul Mundt

sh: pci: Support slot 4 routing on SDK7786.

2010-10-13T22:37:01+00:00

SDK7786 supports connecting either slot3 or 4 to the same PCIe port by
way of FPGA muxing. By default the vertical slot 3 on the baseboard is
enabled, so this adds in a command line option for forcibly enabling the
slot 4 edge connector.

If nothing has been specified on the command line, we fall back to
reading the resistor values for card presence to figure out where to
route the port to.

Signed-off-by: Paul Mundt

sh: pci: Use a generic raw spinlock for PCI config access locking.

2010-09-20T09:56:13+00:00

This copies the pci_config_lock idea from x86 over, allowing us to kill
off a couple of existing private locks. At the same time, these need to
be converted to raw spinlocks for -rt kernels, so we make that change at
the same time. This should make it easier for future parts to get the
locking right instead of inevitable ending up with lock type mismatches.

Signed-off-by: Paul Mundt