<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/sh/include/asm/cachectl.h, branch v2.6.38.2</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>sh: fix sys_cacheflush error checking</title>
<updated>2009-08-24T09:59:09+00:00</updated>
<author>
<name>Giuseppe Cavallaro</name>
<email>peppe.cavallaro@st.com</email>
</author>
<published>2009-08-24T09:59:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=788e6af37a4ace8721eda72e4abe66fe0f6b49fd'/>
<id>788e6af37a4ace8721eda72e4abe66fe0f6b49fd</id>
<content type='text'>
sys_cacheflush should return with EINVAL if the cache parameter is not
one of ICACHE, DCACHE or BCACHE.
So, we need to include 0 in the first check.

It also adds the three definitions above as wrapper of the existent macros.

PS: ltp cacheflush01 test now passes.

Signed-off-by: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;
Signed-off-by: Stuart Menefy &lt;stuart.menefy@st.com&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
sys_cacheflush should return with EINVAL if the cache parameter is not
one of ICACHE, DCACHE or BCACHE.
So, we need to include 0 in the first check.

It also adds the three definitions above as wrapper of the existent macros.

PS: ltp cacheflush01 test now passes.

Signed-off-by: Giuseppe Cavallaro &lt;peppe.cavallaro@st.com&gt;
Signed-off-by: Stuart Menefy &lt;stuart.menefy@st.com&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Add sys_cacheflush() call for SH CPUs.</title>
<updated>2009-08-24T09:16:56+00:00</updated>
<author>
<name>Stuart Menefy</name>
<email>stuart.menefy@st.com</email>
</author>
<published>2009-08-24T09:16:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6d243dd37002bcee54841852ab1b8606fd457851'/>
<id>6d243dd37002bcee54841852ab1b8606fd457851</id>
<content type='text'>
Adds a system call to allow user code to flush code from the cache.
You can use instructions for the data side, but the iside can
only be done by a flush ROM which really only works with a direct
mapped cache. The later SH4's have 2 way Iside, so this call allows
a portable way to flush the cache.

Signed-off-by: Stuart Menefy &lt;stuart.menefy@st.com&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Adds a system call to allow user code to flush code from the cache.
You can use instructions for the data side, but the iside can
only be done by a flush ROM which really only works with a direct
mapped cache. The later SH4's have 2 way Iside, so this call allows
a portable way to flush the cache.

Signed-off-by: Stuart Menefy &lt;stuart.menefy@st.com&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
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