linux-toradex.git/arch/sh/kernel/cpu/irq/Makefile, branch v4.19

treewide: Fix printk() message errors

2016-12-14T09:54:27+00:00

This patch fix spelling typos in printk and kconfig.

Signed-off-by: Masanari Iida 
Acked-by: Randy Dunlap 
Signed-off-by: Jiri Kosina

sh: Move the shared INTC code out to drivers/sh/

2008-10-01T07:13:54+00:00

The INTC code will be re-used across different architectures, so move
this out to drivers/sh/ and include/linux/sh_intc.h respectively.

Signed-off-by: Paul Mundt

sh: remove maskreg irq code

2008-02-14T05:22:10+00:00

This patch removes the maskreg irq code since it is not in use anymore.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: Get the mach-cayman IRQ support building.

2008-01-28T04:18:54+00:00

Signed-off-by: Paul Mundt

sh: imask IRQ depends on sh32.

2008-01-28T04:18:43+00:00

Signed-off-by: Paul Mundt

sh: remove CONFIG_CPU_HAS_INTC_IRQ

2007-09-21T02:57:51+00:00

All processor specific interrupt code is now converted to make use
of the new intc code. The config option CONFIG_CPU_HAS_INTC_IRQ is
because of that pointless.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: remove intc2 code

2007-09-21T02:57:48+00:00

There is no point in keeping around the now unused intc2 code.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: remove old broken pint code

2007-07-25T01:46:32+00:00

The code in arch/sh/kernel/cpu/irq/pint.c doesn't compile, so let's
get rid of it to make space for a future pint implementation on top
of intc.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: intc - shared IPR and INTC2 controller

2007-07-20T03:18:20+00:00

This is the second version of the shared interrupt controller patch
for the sh architecture, fixing up handling of intc_reg_fns[].

The three main advantages with this controller over the existing
ones are:

	- Both priority (ipr) and bitmap (intc2) registers are
	  supported
	- External pin sense configuration is supported, ie edge
	  vs level triggered
	- CPU/Board specific code maps 1:1 with datasheet for
	  easy verification

This controller can easily coexist with the current IPR and INTC2
controllers, but the idea is that CPUs/Boards should be moved over
to this controller over time so we have a single code base to
maintain.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: Solution Engine SH7705 board and CPU updates.

2007-05-07T02:11:56+00:00

This fixes up SH7705 CPU support and the SE7705 board
for some of the recent changes.

Signed-off-by: Nobuhiro Iwamatsu 
Signed-off-by: Paul Mundt