linux-toradex.git/arch/sparc/include, branch v3.0.2 Linux kernel for Apalis and Colibri modules sparc: Access kernel TSB using physical addressing when possible. 2011-08-16T01:31:41+00:00 David S. Miller davem@davemloft.net 2011-08-05T07:53:57+00:00 b548d908c7c625ae97679f1a8d86960fbe649e10 [ Upstream commit 9076d0e7e02b98f7a65df10d1956326c8d8ba61a ] On sun4v this is basically required since we point the hypervisor and the TSB walking hardware at these tables using physical addressing too. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 
[ Upstream commit 9076d0e7e02b98f7a65df10d1956326c8d8ba61a ]

On sun4v this is basically required since we point the hypervisor and
the TSB walking hardware at these tables using physical addressing
too.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
sparc: Use popc when possible for ffs/__ffs/ffz. 2011-08-16T01:31:41+00:00 David S. Miller davem@davemloft.net 2011-08-03T03:23:34+00:00 27ff2c083e9b0e719983eebda886775a5cea5cdd [ Upstream commit 56d205cc5c0a3032a605121d4253e111193bf923 ] Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 
[ Upstream commit 56d205cc5c0a3032a605121d4253e111193bf923 ]

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
sparc: Set reboot-cmd using reboot data hypervisor call if available. 2011-08-16T01:31:41+00:00 David S. Miller davem@davemloft.net 2011-08-02T06:27:17+00:00 e6aefcf11c97220fecacddbad36335461b486ec9 [ Upstream commit ea5e7447ea9d555558e0f13798f5143dd51a915a ] Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 
[ Upstream commit ea5e7447ea9d555558e0f13798f5143dd51a915a ]

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
sparc: Add some missing hypervisor API groups. 2011-08-16T01:31:41+00:00 David S. Miller davem@davemloft.net 2011-08-02T05:45:18+00:00 7508c959a81a93997e5d8cf6e75168ef8bb3f93e [ Upstream commit e2eb9f8158ead43a88c0f0b4d74257b1be938a18 ] Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 
[ Upstream commit e2eb9f8158ead43a88c0f0b4d74257b1be938a18 ]

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
sparc: Use popc if possible for hweight routines. 2011-08-16T01:31:40+00:00 David S. Miller davem@davemloft.net 2011-07-29T16:42:07+00:00 0975b446b4e724570a63dfa001e1a2c0f2808724 [ Upstream commit ef7c4d4675d2a9206f913f26ca1a5cd41bff9d41 ] Just like powerpc, we code patch at boot time. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 
[ Upstream commit ef7c4d4675d2a9206f913f26ca1a5cd41bff9d41 ]

Just like powerpc, we code patch at boot time.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
sparc: Sanitize cpu feature detection and reporting. 2011-08-16T01:31:40+00:00 David S. Miller davem@davemloft.net 2011-07-29T06:31:26+00:00 f1b7f4b6d299fcad9b6bb84d86cef2094613ea75 [ Upstream commit ac85fe8b21248054851e05bfaa352562e5b06dd3 ] Instead of evaluating the cpu features for ELF_HWCAP every exec, calculate it once at boot time. Add AV_SPARC_* capability flag bits, compatible with what Solaris reports to applications. Report these capabilities once in the kernel log, and also via /proc/cpuinfo in a new "cpucaps" entry. If available, fetch the cpu features from the machine description 'hwcap-list' property of the 'cpu' node. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 
[ Upstream commit ac85fe8b21248054851e05bfaa352562e5b06dd3 ]

Instead of evaluating the cpu features for ELF_HWCAP every exec,
calculate it once at boot time.

Add AV_SPARC_* capability flag bits, compatible with what Solaris
reports to applications.

Report these capabilities once in the kernel log, and also via
/proc/cpuinfo in a new "cpucaps" entry.

If available, fetch the cpu features from the machine description
'hwcap-list' property of the 'cpu' node.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
sparc: Detect and handle UltraSPARC-T3 cpu types. 2011-08-16T01:31:40+00:00 David S. Miller davem@davemloft.net 2011-07-28T04:06:16+00:00 b25f76a8fe3230786712d18a83c7a57b7abc6624 [ Upstream commit 4ba991d3eb379fbaa22049e7002341e97a673685 ] The cpu compatible string we look for is "SPARC-T3". As far as memset/memcpy optimizations go, we treat this chip the same as Niagara-T2/T2+. Use cache initializing stores for memset, and use perfetch, FPU block loads, cache initializing stores, and block stores for copies. We use the Niagara-T2 perf support, since T3 is a close relative in this regard. Later we'll add support for the new events T3 can report, plus enable T3's new "sample" mode. For now I haven't added any new ELF hwcap flags. We probably need to add a couple, for example: T2 and T3 both support the population count instruction in hardware. T3 supports VIS3 instructions, including support (finally) for partitioned shift. One can also now move directly between float and integer registers. T3 supports instructions meant to help with Galois Field and other HPC calculations, such as XOR multiply. Also there are "OP and negate" instructions, for example "fnmul" which is multiply-and-negate. T3 recognizes the transactional memory opcodes, however since transactional memory isn't supported: 1) 'commit' behaves as a NOP and 2) 'chkpt' always branches 3) 'rdcps' returns all zeros and 4) 'wrcps' behaves as a NOP. So we'll need about 3 new elf capability flags in the end to represent all of these things. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 
[ Upstream commit 4ba991d3eb379fbaa22049e7002341e97a673685 ]

The cpu compatible string we look for is "SPARC-T3".

As far as memset/memcpy optimizations go, we treat this chip the same
as Niagara-T2/T2+.  Use cache initializing stores for memset, and use
perfetch, FPU block loads, cache initializing stores, and block stores
for copies.

We use the Niagara-T2 perf support, since T3 is a close relative in
this regard.  Later we'll add support for the new events T3 can
report, plus enable T3's new "sample" mode.

For now I haven't added any new ELF hwcap flags.  We probably need
to add a couple, for example:

T2 and T3 both support the population count instruction in hardware.

T3 supports VIS3 instructions, including support (finally) for
partitioned shift.  One can also now move directly between float
and integer registers.

T3 supports instructions meant to help with Galois Field and other HPC
calculations, such as XOR multiply.  Also there are "OP and negate"
instructions, for example "fnmul" which is multiply-and-negate.

T3 recognizes the transactional memory opcodes, however since
transactional memory isn't supported: 1) 'commit' behaves as a NOP and
2) 'chkpt' always branches 3) 'rdcps' returns all zeros and 4) 'wrcps'
behaves as a NOP.

So we'll need about 3 new elf capability flags in the end to represent
all of these things.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
sparc: Add T3 sun4v cpu type and hypervisor group defines. 2011-08-16T01:31:40+00:00 David S. Miller davem@davemloft.net 2011-07-28T03:42:51+00:00 7cc3d70509d05b40ae926b8f6c886abab7ace827 [ Upstream commit 15e3608d7c273947dbf2eadbcaa66e51143928fb ] Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 
[ Upstream commit 15e3608d7c273947dbf2eadbcaa66e51143928fb ]

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
sparc,kgdbts: fix compile regression with kgdb test suite 2011-07-21T22:29:49+00:00 Jason Wessel jason.wessel@windriver.com 2011-07-19T20:43:16+00:00 33d8881af5584fb7994f6b3d17fc11dcaf07b3b2 Commit 63ab25ebbc (kgdbts: unify/generalize gdb breakpoint adjustment) introduced a compile regression on sparc. kgdbts.c: In function 'check_and_rewind_pc': kgdbts.c:307: error: implicit declaration of function 'instruction_pointer_set' Simply add the correct macro definition for instruction pointer on the Sparc architecture. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: David S. Miller <davem@davemloft.net> 
Commit 63ab25ebbc (kgdbts: unify/generalize gdb breakpoint adjustment)
introduced a compile regression on sparc.

kgdbts.c: In function 'check_and_rewind_pc':
kgdbts.c:307: error: implicit declaration of function 'instruction_pointer_set'

Simply add the correct macro definition for instruction pointer on the
Sparc architecture.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: David S. Miller <davem@davemloft.net>
sparc/irqs: Do not trace arch_local_{*,irq_*} functions 2011-07-06T15:00:29+00:00 Steven Rostedt rostedt@goodmis.org 2011-07-06T15:00:29+00:00 18d85bc558edfa5de7f5b49b6a25fbfdc42628e0 Do not trace arch_local_save_flags(), arch_local_irq_*() and friends. Although they are marked inline, gcc may still make a function out of them and add it to the pool of functions that are traced by the function tracer. This can cause undesirable results (kernel panic, triple faults, etc). Add the notrace notation to prevent them from ever being traced. Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: David S. Miller <davem@davemloft.net> 
Do not trace arch_local_save_flags(), arch_local_irq_*() and friends.
Although they are marked inline, gcc may still make a function out of
them and add it to the pool of functions that are traced by the function
tracer. This can cause undesirable results (kernel panic, triple faults,
etc).

Add the notrace notation to prevent them from ever being traced.

Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: David S. Miller <davem@davemloft.net>