<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/sparc/kernel/leon_kernel.c, branch v3.2.58</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>sparc: remove several unnecessary module.h include instances</title>
<updated>2011-10-31T23:30:54+00:00</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2011-07-22T12:02:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cdd0b0ac120185ea1adb4dd42ce552617e1cc0d6'/>
<id>cdd0b0ac120185ea1adb4dd42ce552617e1cc0d6</id>
<content type='text'>
Building an allyesconfig doesn't reveal a hidden need
for any of these.  Since module.h brings in the whole kitchen
sink, it just needlessly adds 30k+ lines to the cpp burden.

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Building an allyesconfig doesn't reveal a hidden need
for any of these.  Since module.h brings in the whole kitchen
sink, it just needlessly adds 30k+ lines to the cpp burden.

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc32, leon: bugfix in LEON SMP interrupt init</title>
<updated>2011-06-09T23:12:34+00:00</updated>
<author>
<name>Daniel Hellstrom</name>
<email>daniel@gaisler.com</email>
</author>
<published>2011-06-09T02:54:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=10f0d07c51516bd24b040016c6d4304eef05f115'/>
<id>10f0d07c51516bd24b040016c6d4304eef05f115</id>
<content type='text'>
During converting per-cpu ticker to genirq layer some
IRQ initialization code was removed by commit
2cf9530420e446bb61f665d02afeb81070106900 ("sparc32,leon:
per-cpu ticker use genirq per-cpu handler").

This patch reintroduces the code at the same place it was
removed from. IRQ12 - IRQ14 will crash on LEON SMP without
this patch because it will run the SUN4M IRQ trap handler.

Reported-by: Jan Andersson &lt;jan@gaisler.com&gt;
Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
During converting per-cpu ticker to genirq layer some
IRQ initialization code was removed by commit
2cf9530420e446bb61f665d02afeb81070106900 ("sparc32,leon:
per-cpu ticker use genirq per-cpu handler").

This patch reintroduces the code at the same place it was
removed from. IRQ12 - IRQ14 will crash on LEON SMP without
this patch because it will run the SUN4M IRQ trap handler.

Reported-by: Jan Andersson &lt;jan@gaisler.com&gt;
Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc32,leon: add GRPCI2 PCI Host driver</title>
<updated>2011-06-02T21:32:38+00:00</updated>
<author>
<name>Daniel Hellstrom</name>
<email>daniel@gaisler.com</email>
</author>
<published>2011-05-23T21:04:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5d07b7869a48aec43ee0de6413a6657457287b63'/>
<id>5d07b7869a48aec43ee0de6413a6657457287b63</id>
<content type='text'>
The DMA region must be accessible in order for PCI peripheral
drivers to work, the sparc32 has DMA in the normal memory
zone which requires the GRPCI2 to PCI target BARs so that all
kernel low mem (192MB) can be mapped 1:1 to PCI address
space. The GRPCI2 has resizeable target BARs, by default the
first is made 256MB and all other BARs are disabled.

I/O space are always located on 0x1000-0x10000, but accessed
through the GRPCI2 PCI I/O Window memory mapped to virtual
address space.

Configuration space is accessed through the 64KB GRPCI2 PCI
CFG Window using LDA bypassing the MMU.

The GRPCI2 has a single PCI Window for prefetchable and non-
prefetchable address space, it is up to the AHB master
requesting PCI data to determine access type. Memory space
is mapped 1:1.

The GRPCI2 core can be configured in 4 different IRQ modes,
where PCI Interrupt, Error Interrupt and DMA Interrupt are
shared on a single IRQ line or at most 5 IRQs are used. The
GRPCI2 can mask/unmask PCI interrupts, Err and DMA in the control
and check status bits which tells us which IRQ really happended.
The GENIRQ layer is used to unmask/mask each individual IRQ
source by creating virtual IRQs and implementing a IRQ chip.

The optional DMA functionality of the GRPCI2 is not supported
by this patch.

Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The DMA region must be accessible in order for PCI peripheral
drivers to work, the sparc32 has DMA in the normal memory
zone which requires the GRPCI2 to PCI target BARs so that all
kernel low mem (192MB) can be mapped 1:1 to PCI address
space. The GRPCI2 has resizeable target BARs, by default the
first is made 256MB and all other BARs are disabled.

I/O space are always located on 0x1000-0x10000, but accessed
through the GRPCI2 PCI I/O Window memory mapped to virtual
address space.

Configuration space is accessed through the 64KB GRPCI2 PCI
CFG Window using LDA bypassing the MMU.

The GRPCI2 has a single PCI Window for prefetchable and non-
prefetchable address space, it is up to the AHB master
requesting PCI data to determine access type. Memory space
is mapped 1:1.

The GRPCI2 core can be configured in 4 different IRQ modes,
where PCI Interrupt, Error Interrupt and DMA Interrupt are
shared on a single IRQ line or at most 5 IRQs are used. The
GRPCI2 can mask/unmask PCI interrupts, Err and DMA in the control
and check status bits which tells us which IRQ really happended.
The GENIRQ layer is used to unmask/mask each individual IRQ
source by creating virtual IRQs and implementing a IRQ chip.

The optional DMA functionality of the GRPCI2 is not supported
by this patch.

Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc32,leon: don't rely on bootloader to mask IRQs</title>
<updated>2011-04-21T23:44:45+00:00</updated>
<author>
<name>Daniel Hellstrom</name>
<email>daniel@gaisler.com</email>
</author>
<published>2011-04-21T04:20:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=970def654e9df1ad28ddb466bb1d123a55e1e7e7'/>
<id>970def654e9df1ad28ddb466bb1d123a55e1e7e7</id>
<content type='text'>
Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc32,leon: operate on boot-cpu IRQ controller registers</title>
<updated>2011-04-21T23:44:45+00:00</updated>
<author>
<name>Daniel Hellstrom</name>
<email>daniel@gaisler.com</email>
</author>
<published>2011-04-21T04:20:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=01dae0f08dddf6ba86f956e60dceee4968f7a555'/>
<id>01dae0f08dddf6ba86f956e60dceee4968f7a555</id>
<content type='text'>
* proper initialization of boot_cpu_id (no hardcoding to 0)
 * use boot_cpu_id index to address into the IRQ controller where
   appropriate

Each CPU has a separate set of IRQ controller registers, this
patch makes sure that the boot-cpu registers are used instead
of CPU0's.

Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* proper initialization of boot_cpu_id (no hardcoding to 0)
 * use boot_cpu_id index to address into the IRQ controller where
   appropriate

Each CPU has a separate set of IRQ controller registers, this
patch makes sure that the boot-cpu registers are used instead
of CPU0's.

Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc32,leon: implement genirq CPU affinity</title>
<updated>2011-04-21T22:31:31+00:00</updated>
<author>
<name>Daniel Hellstrom</name>
<email>daniel@gaisler.com</email>
</author>
<published>2011-04-19T23:41:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5eb1f4fc167f5adc5f15e722e25eff6713fb3406'/>
<id>5eb1f4fc167f5adc5f15e722e25eff6713fb3406</id>
<content type='text'>
A simple implementation of CPU affinity, the first CPU in
the affinity CPU mask always takes the IRQ.

Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
A simple implementation of CPU affinity, the first CPU in
the affinity CPU mask always takes the IRQ.

Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc32, leon: code cleanup of timer/IRQ controller initialization</title>
<updated>2011-04-21T22:31:31+00:00</updated>
<author>
<name>Daniel Hellstrom</name>
<email>daniel@gaisler.com</email>
</author>
<published>2011-04-19T23:41:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a481b5d0cb5d1884f16460b4846755518360f1ca'/>
<id>a481b5d0cb5d1884f16460b4846755518360f1ca</id>
<content type='text'>
Cleaned up leon_init_timers() by removing unnecessary double checking
and one indentation level. Changed LEON_IMASK to LEON_IMASK(cpu).

Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Cleaned up leon_init_timers() by removing unnecessary double checking
and one indentation level. Changed LEON_IMASK to LEON_IMASK(cpu).

Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc32,leon: cleaned away code from the LEON2 days</title>
<updated>2011-04-21T22:31:30+00:00</updated>
<author>
<name>Daniel Hellstrom</name>
<email>daniel@gaisler.com</email>
</author>
<published>2011-04-19T23:41:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ea044ec3984472a2e8de91e17872868baac62a50'/>
<id>ea044ec3984472a2e8de91e17872868baac62a50</id>
<content type='text'>
Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc32,leon: per-cpu ticker use genirq per-cpu handler</title>
<updated>2011-04-21T22:31:30+00:00</updated>
<author>
<name>Daniel Hellstrom</name>
<email>daniel@gaisler.com</email>
</author>
<published>2011-04-19T23:41:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2cf9530420e446bb61f665d02afeb81070106900'/>
<id>2cf9530420e446bb61f665d02afeb81070106900</id>
<content type='text'>
Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc32,leon: add support for extended interrupt controller</title>
<updated>2011-04-21T22:31:29+00:00</updated>
<author>
<name>Daniel Hellstrom</name>
<email>daniel@gaisler.com</email>
</author>
<published>2011-04-19T23:41:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4c6773c3954cb1192f70a63e2dc61adc55bb0948'/>
<id>4c6773c3954cb1192f70a63e2dc61adc55bb0948</id>
<content type='text'>
The extended IRQ controller gives the LEON 16 more IRQs.

The patch installs a custom handler for the exetended controller
IRQ, where a register is read and the "real" IRQ causing IRQ is
determined.

Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The extended IRQ controller gives the LEON 16 more IRQs.

The patch installs a custom handler for the exetended controller
IRQ, where a register is read and the "real" IRQ causing IRQ is
determined.

Signed-off-by: Daniel Hellstrom &lt;daniel@gaisler.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
</feed>
