<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/sparc/kernel/pcr.c, branch v4.10</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>sparc: perf: Add support M7 processor</title>
<updated>2015-03-20T01:54:49+00:00</updated>
<author>
<name>David Ahern</name>
<email>david.ahern@oracle.com</email>
</author>
<published>2015-03-19T20:06:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b5aff55d89c27aedcae9521155b81b6aebb6c5d8'/>
<id>b5aff55d89c27aedcae9521155b81b6aebb6c5d8</id>
<content type='text'>
The M7 processor has a different hypervisor group id and different PCR fast
trap values. PIC read/write functions and PCR bit fields are the same as
the T4 so those are reused.

Signed-off-by: David Ahern &lt;david.ahern@oracle.com&gt;
Acked-by: Bob Picco &lt;bob.picco@oracle.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
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<pre>
The M7 processor has a different hypervisor group id and different PCR fast
trap values. PIC read/write functions and PCR bit fields are the same as
the T4 so those are reused.

Signed-off-by: David Ahern &lt;david.ahern@oracle.com&gt;
Acked-by: Bob Picco &lt;bob.picco@oracle.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc64: T5 PMU</title>
<updated>2014-09-17T01:26:40+00:00</updated>
<author>
<name>bob picco</name>
<email>bpicco@meloft.net</email>
</author>
<published>2014-09-16T14:09:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=05aa1651e8b9ca078b1808a2fe7b50703353ec02'/>
<id>05aa1651e8b9ca078b1808a2fe7b50703353ec02</id>
<content type='text'>
The T5 (niagara5) has different PCR related HV fast trap values and a new
HV API Group. This patch utilizes these and shares when possible with niagara4.

We use the same sparc_pmu niagara4_pmu. Should there be new effort to
obtain the MCU perf statistics then this would have to be changed.

Cc: sparclinux@vger.kernel.org
Signed-off-by: Bob Picco &lt;bob.picco@oracle.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The T5 (niagara5) has different PCR related HV fast trap values and a new
HV API Group. This patch utilizes these and shares when possible with niagara4.

We use the same sparc_pmu niagara4_pmu. Should there be new effort to
obtain the MCU perf statistics then this would have to be changed.

Cc: sparclinux@vger.kernel.org
Signed-off-by: Bob Picco &lt;bob.picco@oracle.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc64: Add PCR ops for SPARC-T4.</title>
<updated>2012-08-19T06:26:19+00:00</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2012-08-17T07:20:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6faaeb8ea30e55c9fd7cf65d05f3ce44973d1d12'/>
<id>6faaeb8ea30e55c9fd7cf65d05f3ce44973d1d12</id>
<content type='text'>
This is enough to get the NMIs working, more work is needed
for perf events.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is enough to get the NMIs working, more work is needed
for perf events.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc64: Abstract away the %pcr values used to enable/disable NMI</title>
<updated>2012-08-19T06:26:19+00:00</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2012-08-17T06:31:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ce4a925c29208cf48084d9fa174d965a65246a8d'/>
<id>ce4a925c29208cf48084d9fa174d965a65246a8d</id>
<content type='text'>
We assumed PCR_PIC_PRIV can always be used to disable it, but that
won't be true for SPARC-T4.

This allows us also to get rid of some messy defines used in only
one location.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We assumed PCR_PIC_PRIV can always be used to disable it, but that
won't be true for SPARC-T4.

This allows us also to get rid of some messy defines used in only
one location.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc64: Abstract away the NMI PIC counter computation.</title>
<updated>2012-08-19T06:26:18+00:00</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2012-08-17T06:26:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=73a6b0538c131d489fe7a2581deddb72faca496b'/>
<id>73a6b0538c131d489fe7a2581deddb72faca496b</id>
<content type='text'>
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc64: Abstract away PIC register accesses.</title>
<updated>2012-08-19T06:26:14+00:00</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2012-08-17T06:19:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=09d053c797f4a559af0647e4283b9b9ec0682d10'/>
<id>09d053c797f4a559af0647e4283b9b9ec0682d10</id>
<content type='text'>
And, like for the PCR, allow indexing of different PIC register
numbers.

This also removes all of the non-__KERNEL__ bits from asm/perfctr.h,
nothing kernel side should include it any more.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
And, like for the PCR, allow indexing of different PIC register
numbers.

This also removes all of the non-__KERNEL__ bits from asm/perfctr.h,
nothing kernel side should include it any more.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc64: Add 'reg_num' argument to pcr_ops methods.</title>
<updated>2012-08-19T06:04:08+00:00</updated>
<author>
<name>David S. Miller</name>
<email>davem@davemloft.net</email>
</author>
<published>2012-08-17T04:16:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0bab20ba4c95f56355c24a0b9f03eb486c2a267d'/>
<id>0bab20ba4c95f56355c24a0b9f03eb486c2a267d</id>
<content type='text'>
SPARC-T4 and later have multiple PCR registers, one for each
PIC counter.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
SPARC-T4 and later have multiple PCR registers, one for each
PIC counter.

Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Disintegrate asm/system.h for Sparc</title>
<updated>2012-03-28T17:30:03+00:00</updated>
<author>
<name>David Howells</name>
<email>dhowells@redhat.com</email>
</author>
<published>2012-03-28T17:30:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d550bbd40c0e10aefa05103dadbe0ae42e683707'/>
<id>d550bbd40c0e10aefa05103dadbe0ae42e683707</id>
<content type='text'>
Disintegrate asm/system.h for Sparc.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
cc: sparclinux@vger.kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Disintegrate asm/system.h for Sparc.

Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
cc: sparclinux@vger.kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc: move symbol exporters to use export.h not module.h</title>
<updated>2011-10-31T23:30:53+00:00</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2011-07-22T17:18:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=066bcaca51946c8305e3d637a795e8ccf8dbd3cf'/>
<id>066bcaca51946c8305e3d637a795e8ccf8dbd3cf</id>
<content type='text'>
Many of the core sparc kernel files are not modules, but just
including module.h for exporting symbols.  Now these files can
use the lighter footprint export.h for this role.

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Many of the core sparc kernel files are not modules, but just
including module.h for exporting symbols.  Now these files can
use the lighter footprint export.h for this role.

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sparc: fix implicit use of spitfire.h in pcr.c and of_device_64.c</title>
<updated>2011-10-31T23:30:51+00:00</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2011-08-01T17:42:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c2068dabebf83a7ef65ba977a165730fb8b53ef0'/>
<id>c2068dabebf83a7ef65ba977a165730fb8b53ef0</id>
<content type='text'>
To resolve these on 64bit allnoconfig builds:

  CC      arch/sparc/kernel/pcr.o
arch/sparc/kernel/pcr.c: In function 'register_perf_hsvc':
arch/sparc/kernel/pcr.c:102: error: 'tlb_type' undeclared (first use in this function)

  CC      arch/sparc/kernel/of_device_64.o
arch/sparc/kernel/of_device_64.c: In function 'build_device_resources':
arch/sparc/kernel/of_device_64.c:406: error: 'tlb_type' undeclared (first use in this function)

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To resolve these on 64bit allnoconfig builds:

  CC      arch/sparc/kernel/pcr.o
arch/sparc/kernel/pcr.c: In function 'register_perf_hsvc':
arch/sparc/kernel/pcr.c:102: error: 'tlb_type' undeclared (first use in this function)

  CC      arch/sparc/kernel/of_device_64.o
arch/sparc/kernel/of_device_64.c: In function 'build_device_resources':
arch/sparc/kernel/of_device_64.c:406: error: 'tlb_type' undeclared (first use in this function)

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</pre>
</div>
</content>
</entry>
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