linux-toradex.git/arch/tile/include/asm/cachectl.h, branch master Linux kernel for Apalis and Colibri modules UAPI: (Scripted) Disintegrate arch/tile/include/asm 2012-10-09T08:47:47+00:00 David Howells dhowells@redhat.com 2012-10-09T08:47:47+00:00 df842f79f0e2aed9092a73f611f41f03630a3823 Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com> 
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Michael Kerrisk <mtk.manpages@gmail.com>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Dave Jones <davej@redhat.com>
arch/tile: support <asm/cachectl.h> header for cacheflush() syscall 2012-05-25T16:48:24+00:00 Chris Metcalf cmetcalf@tilera.com 2012-03-29T19:25:59+00:00 cd6f32aa088f4d328e676c35f51b440f2fe5b98c We already had a syscall that did some dcache flushing, but it was not used in practice. Make it MIPS compatible instead so it can do both the DCACHE and ICACHE actions. We have code that wants to be able to use the ICACHE flush mode from userspace so this change enables that. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> 
We already had a syscall that did some dcache flushing, but it was
not used in practice.  Make it MIPS compatible instead so it can
do both the DCACHE and ICACHE actions.  We have code that wants to
be able to use the ICACHE flush mode from userspace so this change
enables that.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>