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<title>linux-toradex.git/arch/tile/kernel/pci.c, branch v3.0.95</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>arch/tile: allocate PCI IRQs later in boot</title>
<updated>2011-05-20T02:56:05+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-17T19:25:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f4de51de2edcd26ec77bfc71b1f00b1de5a5dc20'/>
<id>f4de51de2edcd26ec77bfc71b1f00b1de5a5dc20</id>
<content type='text'>
This change became required due to some recent reworking in the
platform-independent IRQ code.  It is required for 2.6.38 and later.

Cc: stable@kernel.org
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This change became required due to some recent reworking in the
platform-independent IRQ code.  It is required for 2.6.38 and later.

Cc: stable@kernel.org
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: improve support for PCI hotplug</title>
<updated>2011-05-04T18:39:53+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-02T19:09:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=398fa5a9319797e43f67b215337afe62e39475ef'/>
<id>398fa5a9319797e43f67b215337afe62e39475ef</id>
<content type='text'>
Note that this is not complete hot-plug support; hot-unplug is not included.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
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<pre>
Note that this is not complete hot-plug support; hot-unplug is not included.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Fix common misspellings</title>
<updated>2011-03-31T14:26:23+00:00</updated>
<author>
<name>Lucas De Marchi</name>
<email>lucas.demarchi@profusion.mobi</email>
</author>
<published>2011-03-31T01:57:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=25985edcedea6396277003854657b5f3cb31a628'/>
<id>25985edcedea6396277003854657b5f3cb31a628</id>
<content type='text'>
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@profusion.mobi&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@profusion.mobi&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci root complex: support for tile architecture</title>
<updated>2010-11-24T18:13:49+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2010-11-02T16:05:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f02cbbe657939489347cbda598401a56913ffcbd'/>
<id>f02cbbe657939489347cbda598401a56913ffcbd</id>
<content type='text'>
This change enables PCI root complex support for TILEPro.  Unlike
TILE-Gx, TILEPro has no support for memory-mapped I/O, so the PCI
support consists of hypervisor upcalls for PIO, DMA, etc.  However,
the performance is fine for the devices we have tested with so far
(1Gb Ethernet, SATA, etc.).

The &lt;asm/io.h&gt; header was tweaked to be a little bit more aggressive
about disabling attempts to map/unmap IO port space.  The hacky
&lt;asm/pci-bridge.h&gt; header was rolled into the &lt;asm/pci.h&gt; header
and the result was simplified.  Both of the latter two headers were
preliminary versions not meant for release before now - oh well.

There is one quirk for our TILEmpower platform, which accidentally
negotiates up to 5GT and needs to be kicked down to 2.5GT.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This change enables PCI root complex support for TILEPro.  Unlike
TILE-Gx, TILEPro has no support for memory-mapped I/O, so the PCI
support consists of hypervisor upcalls for PIO, DMA, etc.  However,
the performance is fine for the devices we have tested with so far
(1Gb Ethernet, SATA, etc.).

The &lt;asm/io.h&gt; header was tweaked to be a little bit more aggressive
about disabling attempts to map/unmap IO port space.  The hacky
&lt;asm/pci-bridge.h&gt; header was rolled into the &lt;asm/pci.h&gt; header
and the result was simplified.  Both of the latter two headers were
preliminary versions not meant for release before now - oh well.

There is one quirk for our TILEmpower platform, which accidentally
negotiates up to 5GT and needs to be kicked down to 2.5GT.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
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