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<title>linux-toradex.git/arch/tile/kernel/ptrace.c, branch v4.10</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>tile/ptrace: Preserve previous registers for short regset write</title>
<updated>2017-01-06T20:14:08+00:00</updated>
<author>
<name>Dave Martin</name>
<email>Dave.Martin@arm.com</email>
</author>
<published>2017-01-06T17:54:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fd7c99142d77dc4a851879a66715abf12a3193fb'/>
<id>fd7c99142d77dc4a851879a66715abf12a3193fb</id>
<content type='text'>
Ensure that if userspace supplies insufficient data to
PTRACE_SETREGSET to fill all the registers, the thread's old
registers are preserved.

Cc: stable@vger.kernel.org
Signed-off-by: Dave Martin &lt;Dave.Martin@arm.com&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@mellanox.com&gt;
</content>
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<pre>
Ensure that if userspace supplies insufficient data to
PTRACE_SETREGSET to fill all the registers, the thread's old
registers are preserved.

Cc: stable@vger.kernel.org
Signed-off-by: Dave Martin &lt;Dave.Martin@arm.com&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@mellanox.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile/ptrace: run seccomp after ptrace</title>
<updated>2016-06-14T17:54:46+00:00</updated>
<author>
<name>Kees Cook</name>
<email>keescook@chromium.org</email>
</author>
<published>2016-06-03T02:56:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=635efc702984857b45a2a2491ed7a529e14cbdf9'/>
<id>635efc702984857b45a2a2491ed7a529e14cbdf9</id>
<content type='text'>
Close the hole where ptrace can change a syscall out from under seccomp.

Signed-off-by: Kees Cook &lt;keescook@chromium.org&gt;
Cc: Chris Metcalf &lt;cmetcalf@mellanox.com&gt;
</content>
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<pre>
Close the hole where ptrace can change a syscall out from under seccomp.

Signed-off-by: Kees Cook &lt;keescook@chromium.org&gt;
Cc: Chris Metcalf &lt;cmetcalf@mellanox.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>seccomp: Add a seccomp_data parameter secure_computing()</title>
<updated>2016-06-14T17:54:39+00:00</updated>
<author>
<name>Andy Lutomirski</name>
<email>luto@kernel.org</email>
</author>
<published>2016-05-27T19:57:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2f275de5d1ed7269913ef9b4c64a13952c0a38e8'/>
<id>2f275de5d1ed7269913ef9b4c64a13952c0a38e8</id>
<content type='text'>
Currently, if arch code wants to supply seccomp_data directly to
seccomp (which is generally much faster than having seccomp do it
using the syscall_get_xyz() API), it has to use the two-phase
seccomp hooks. Add it to the easy hooks, too.

Cc: linux-arch@vger.kernel.org
Signed-off-by: Andy Lutomirski &lt;luto@kernel.org&gt;
Signed-off-by: Kees Cook &lt;keescook@chromium.org&gt;
</content>
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<pre>
Currently, if arch code wants to supply seccomp_data directly to
seccomp (which is generally much faster than having seccomp do it
using the syscall_get_xyz() API), it has to use the two-phase
seccomp hooks. Add it to the easy hooks, too.

Cc: linux-arch@vger.kernel.org
Signed-off-by: Andy Lutomirski &lt;luto@kernel.org&gt;
Signed-off-by: Kees Cook &lt;keescook@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: move user_exit() to early kernel entry sequence</title>
<updated>2016-01-18T19:49:30+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@ezchip.com</email>
</author>
<published>2015-12-23T22:13:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=1bb50cad45f4a3fb9a339006d76efc50f70eed5b'/>
<id>1bb50cad45f4a3fb9a339006d76efc50f70eed5b</id>
<content type='text'>
This ensures that we always notify context tracking that we
have exited from user space no matter how we enter the kernel.
It is similar to how arm64 handles context tracking, for example.

This allows the removal of all the exception_enter() calls that
were added in commit 49e4e15619cd ("tile: support CONTEXT_TRACKING and
thus NOHZ_FULL").

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This ensures that we always notify context tracking that we
have exited from user space no matter how we enter the kernel.
It is similar to how arm64 handles context tracking, for example.

This allows the removal of all the exception_enter() calls that
were added in commit 49e4e15619cd ("tile: support CONTEXT_TRACKING and
thus NOHZ_FULL").

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: enable full SECCOMP support</title>
<updated>2015-07-30T16:32:16+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@ezchip.com</email>
</author>
<published>2015-07-22T18:30:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=a0ddef81f4aeeeec3326f6b6a255d8ea13b41908'/>
<id>a0ddef81f4aeeeec3326f6b6a255d8ea13b41908</id>
<content type='text'>
Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: support CONTEXT_TRACKING and thus NOHZ_FULL</title>
<updated>2015-04-17T18:01:10+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@ezchip.com</email>
</author>
<published>2015-03-23T18:23:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=49e4e15619cd7cd9fc275d460fae2a95c1337fcc'/>
<id>49e4e15619cd7cd9fc275d460fae2a95c1337fcc</id>
<content type='text'>
Add the TIF_NOHZ flag appropriately.

Add call to user_exit() on entry to do_work_pending() and on entry
to syscalls via do_syscall_trace_enter(), and also the top of
do_syscall_trace_exit() just because it's done in x86.

Add call to user_enter() at the bottom of do_work_pending() once we
have no more work to do before returning to userspace.

Wrap all the trap code in exception_enter() / exception_exit().

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
Acked-by: Frederic Weisbecker &lt;fweisbec@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the TIF_NOHZ flag appropriately.

Add call to user_exit() on entry to do_work_pending() and on entry
to syscalls via do_syscall_trace_enter(), and also the top of
do_syscall_trace_exit() just because it's done in x86.

Add call to user_enter() at the bottom of do_work_pending() once we
have no more work to do before returning to userspace.

Wrap all the trap code in exception_enter() / exception_exit().

Signed-off-by: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
Acked-by: Frederic Weisbecker &lt;fweisbec@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: correct r1 value during syscall tracing</title>
<updated>2013-08-30T15:56:20+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2013-08-09T19:42:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9b5bbf729d2db27ecb477b42c0701c1c97eb5603'/>
<id>9b5bbf729d2db27ecb477b42c0701c1c97eb5603</id>
<content type='text'>
The r1 value is set based on the r0 value as we return to user space.
So tracing tools won't automatically see the right value.  Fix this by
generating the correct r1 value in do_syscall_trace_exit() rather
than trying to tamper with the hot path in syscall return.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The r1 value is set based on the r0 value as we return to user space.
So tracing tools won't automatically see the right value.  Fix this by
generating the correct r1 value in do_syscall_trace_exit() rather
than trying to tamper with the hot path in syscall return.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: fast-path unaligned memory access for tilegx</title>
<updated>2013-08-13T20:04:10+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2013-08-06T20:04:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2f9ac29eec71a696cb0dcc5fb82c0f8d4dac28c9'/>
<id>2f9ac29eec71a696cb0dcc5fb82c0f8d4dac28c9</id>
<content type='text'>
This change enables unaligned userspace memory access via a kernel
fast path on tilegx.  The kernel tracks user PC/instruction pairs
per-thread using a direct-mapped cache in userspace.  The cache
maps those PC/instruction pairs to JIT'ed instruction sequences that
load or store using byte-wide load store intructions and then
synthesize 2-, 4- or 8-byte load or store results.  Once an
instruction has been seen to generate an unaligned access once,
subsequent hits on that instruction typically require overhead
of only around 50 cycles if cache and TLB is hot.

We support the prctl() PR_GET_UNALIGN / PR_SET_UNALIGN sys call to
enable or disable unaligned fixups on a per-process basis.

To do this we pull some of the tilepro unaligned support out of the
single_step.c file; tilepro uses instruction disassembly for both
single-step and unaligned access support.  Since tilegx actually has
hardware singlestep support, though, it's cleaner to keep the tilegx
unaligned access code in a separate file.  While we're at it,
properly rename the tilepro-specific types, etc., to have tilepro
suffixes instead of generic tile suffixes.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This change enables unaligned userspace memory access via a kernel
fast path on tilegx.  The kernel tracks user PC/instruction pairs
per-thread using a direct-mapped cache in userspace.  The cache
maps those PC/instruction pairs to JIT'ed instruction sequences that
load or store using byte-wide load store intructions and then
synthesize 2-, 4- or 8-byte load or store results.  Once an
instruction has been seen to generate an unaligned access once,
subsequent hits on that instruction typically require overhead
of only around 50 cycles if cache and TLB is hot.

We support the prctl() PR_GET_UNALIGN / PR_SET_UNALIGN sys call to
enable or disable unaligned fixups on a per-process basis.

To do this we pull some of the tilepro unaligned support out of the
single_step.c file; tilepro uses instruction disassembly for both
single-step and unaligned access support.  Since tilegx actually has
hardware singlestep support, though, it's cleaner to keep the tilegx
unaligned access code in a separate file.  While we're at it,
properly rename the tilepro-specific types, etc., to have tilepro
suffixes instead of generic tile suffixes.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: Fix syscall return value passed to tracepoint</title>
<updated>2013-04-24T20:45:55+00:00</updated>
<author>
<name>Simon Marchi</name>
<email>simon.marchi@polymtl.ca</email>
</author>
<published>2013-04-17T15:01:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9fc1894c9883439245b225d16100d6a55b25373a'/>
<id>9fc1894c9883439245b225d16100d6a55b25373a</id>
<content type='text'>
Currently the syscall number is passed, but it should be the return
value, which is kept in r0.

Signed-off-by: Simon Marchi &lt;simon.marchi@polymtl.ca&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt; [using a raw 0 value]
</content>
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<pre>
Currently the syscall number is passed, but it should be the return
value, which is kept in r0.

Signed-off-by: Simon Marchi &lt;simon.marchi@polymtl.ca&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt; [using a raw 0 value]
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: support TIF_SYSCALL_TRACEPOINT; select HAVE_SYSCALL_TRACEPOINTS</title>
<updated>2013-03-22T19:46:18+00:00</updated>
<author>
<name>Simon Marchi</name>
<email>simon.marchi@polymtl.ca</email>
</author>
<published>2013-01-22T00:54:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ef567f25d5d9d803b89bc2aec6bb71fe8b4bebd9'/>
<id>ef567f25d5d9d803b89bc2aec6bb71fe8b4bebd9</id>
<content type='text'>
This patch adds support for the TIF_SYSCALL_TRACEPOINT on the tile
architecture. Basically, it calls the appropriate tracepoints on syscall
entry and exit.

Signed-off-by: Simon Marchi &lt;simon.marchi@polymtl.ca&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
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<pre>
This patch adds support for the TIF_SYSCALL_TRACEPOINT on the tile
architecture. Basically, it calls the appropriate tracepoints on syscall
entry and exit.

Signed-off-by: Simon Marchi &lt;simon.marchi@polymtl.ca&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
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