linux-toradex.git/arch/tile/lib/atomic_asm_32.S, branch v4.9.3

locking/atomic, arch/tile: Fix tilepro build

2016-06-24T06:17:04+00:00

The tilepro change wasn't ever compiled it seems (the 0day built bot
also doesn't have a toolchain for it).

Make it work.

The thing that makes the patch bigger than desired is namespace
collision with the C11 __atomic builtin functions. So rename the
tilepro functions to __atomic32.

Reported-by: Sudip Mukherjee 
Signed-off-by: Peter Zijlstra (Intel) 
Acked-by: Chris Metcalf 
Cc: Linus Torvalds 
Cc: Peter Zijlstra 
Cc: Stephen Rothwell 
Cc: Thomas Gleixner 
Fixes: 1af5de9af138 ("locking/atomic, arch/tile: Implement atomic{,64}_fetch_{add,sub,and,or,xor}()")
Link: http://lkml.kernel.org/r/20160622091649.GB30154@twins.programming.kicks-ass.net
Signed-off-by: Ingo Molnar

locking/atomic, arch/tile: Implement atomic{,64}_fetch_{add,sub,and,or,xor}()

2016-06-16T08:48:30+00:00

Implement FETCH-OP atomic primitives, these are very similar to the
existing OP-RETURN primitives we already have, except they return the
value of the atomic variable _before_ modification.

This is especially useful for irreversible operations -- such as
bitops (because it becomes impossible to reconstruct the state prior
to modification).

Signed-off-by: Peter Zijlstra (Intel) 
Acked-by: Chris Metcalf 
Cc: Andrew Morton 
Cc: Linus Torvalds 
Cc: Paul E. McKenney 
Cc: Peter Zijlstra 
Cc: Thomas Gleixner 
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar

tile: Provide atomic_{or,xor,and}

2015-07-27T12:06:24+00:00

Implement atomic logic ops -- atomic_{or,xor,and}.

For tilegx, these are relatively straightforward; the architecture
provides atomic "or" and "and", both 32-bit and 64-bit.  To support
xor we provide a loop using "cmpexch".

For the older 32-bit tilepro architecture, we have to extend
the set of low-level assembly routines to include 32-bit "and",
as well as all three 64-bit routines.  Somewhat confusingly,
some 32-bit versions are already used by the bitops inlines, with
parameter types appropriate for bitops, so we have to do a bit of
casting to match "int" to "unsigned long".

Signed-off-by: Chris Metcalf 
Signed-off-by: Peter Zijlstra (Intel) 
Link: http://lkml.kernel.org/r/1436474297-32187-1-git-send-email-cmetcalf@ezchip.com
Signed-off-by: Thomas Gleixner

tile: use proper .align directives on __ex_table sections

2013-08-30T15:56:11+00:00

This may fix a reported bug where an R_TILEGX_64 in a module was not
pointing to an aligned address.

Reported-by: Simon Marchi 
Signed-off-by: Chris Metcalf

tile: revert change from to in asm files

2011-10-13T12:25:01+00:00

The 32-bit TILEPro support uses some #defines in 
for atomic support routines in assembly.  To make this more explicit,
I've turned those includes into includes of , which
should hopefully make it clear that they shouldn't be bombed into
 in any cleanups.

Signed-off-by: Chris Metcalf

atomic: use

2011-07-26T23:49:47+00:00

This allows us to move duplicated code in 
(atomic_inc_not_zero() for now) to 

Signed-off-by: Arun Sharma 
Reviewed-by: Eric Dumazet 
Cc: Ingo Molnar 
Cc: David Miller 
Cc: Eric Dumazet 
Acked-by: Mike Frysinger 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

arch/tile: allow nonatomic stores to interoperate with fast atomic syscalls

2011-05-04T18:40:07+00:00

This semantic was already true for atomic operations within the kernel,
and this change makes it true for the fast atomic syscalls (__NR_cmpxchg
and __NR_atomic_update) as well.  Previously, user-space had to use
the fast atomic syscalls exclusively to update memory, since raw stores
could lose a race with the atomic update code even when the atomic update
hadn't actually modified the value.

With this change, we no longer write back the value to memory if it
hasn't changed.  This allows certain types of idioms in user space to
work as expected, e.g. "atomic exchange" to acquire a spinlock, followed
by a raw store of zero to release the lock.

Signed-off-by: Chris Metcalf

arch/tile: fix some comments and whitespace

2011-03-10T18:14:03+00:00

This is a grab bag of changes with no actual change to generated code.
This includes whitespace and comment typos, plus a couple of stale
comments being removed.

Signed-off-by: Chris Metcalf

arch/tile: Fix bug in support for atomic64_xx() ops.

2010-07-06T17:41:39+00:00

This wasn't properly tested until the perf-event subsystem started
to get brought up under the tile architecture.

The bug caused bogus atomic64_cmpxchg() values to be returned,
among other things.

Signed-off-by: Chris Metcalf 
Acked-by: Arnd Bergmann

arch/tile: core support for Tilera 32-bit chips.

2010-06-04T21:11:18+00:00

This change is the core kernel support for TILEPro and TILE64 chips.
No driver support (except the console driver) is included yet.

This includes the relevant Linux headers in asm/; the low-level
low-level "Tile architecture" headers in arch/, which are
shared with the hypervisor, etc., and are build-system agnostic;
and the relevant hypervisor headers in hv/.

Signed-off-by: Chris Metcalf 
Acked-by: Arnd Bergmann 
Acked-by: FUJITA Tomonori 
Reviewed-by: Paul Mundt