linux-toradex.git/arch/x86/boot/pmjump.S, branch v3.2.8 Linux kernel for Apalis and Colibri modules x86, setup: move 32-bit code to .text32 2009-03-17T22:26:06+00:00 H. Peter Anvin hpa@linux.intel.com 2009-03-17T22:26:06+00:00 be721696cac9d66566d59b205ee573ecb2f7c35b Impact: cleanup The setup code is mostly 16-bit code, but there is a small stub of 32-bit code at the end. Move the 32-bit code to a separate segment, .text32, to avoid scrambling the disassembly. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> 
Impact: cleanup

The setup code is mostly 16-bit code, but there is a small stub of
32-bit code at the end.  Move the 32-bit code to a separate segment,
.text32, to avoid scrambling the disassembly.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
x86: pmjump - use GLOBAL,ENDPROC macros 2009-02-19T16:13:00+00:00 Cyrill Gorcunov gorcunov@gmail.com 2009-02-13T21:50:21+00:00 324bda9e47f53aebec1376ee89bba8128c8455e2 Impact: cleanup We are in setup stage so we use GLOBAL instead of ENTRY and do not increase code size. Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> 
Impact: cleanup

We are in setup stage so we use GLOBAL
instead of ENTRY and do not increase code
size.

Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
x86: fix regression: boot failure on AMD Elan TS-5500 2008-07-01T08:53:29+00:00 H. Peter Anvin hpa@zytor.com 2008-06-30T22:42:47+00:00 2ee2394b682c0ee99b0f083abe6c57727e6edb69 Jeremy Fitzhardinge wrote: > > Maybe it really does require the far jump immediately after setting PE > in cr0... > > Hm, I don't remember this paragraph being in vol 3a, section 8.9.1 > before. Is it a recent addition? > > Random failures can occur if other instructions exist between steps > 3 and 4 above. Failures will be readily seen in some situations, > such as when instructions that reference memory are inserted between > steps 3 and 4 while in system management mode. > I don't remember that, either. Signed-off-by: Ingo Molnar <mingo@elte.hu> 
Jeremy Fitzhardinge wrote:
>
> Maybe it really does require the far jump immediately after setting PE
> in cr0...
>
> Hm, I don't remember this paragraph being in vol 3a, section 8.9.1
> before.  Is it a recent addition?
>
>    Random failures can occur if other instructions exist between steps
>    3 and 4 above.  Failures will be readily seen in some situations,
>    such as when instructions that reference memory are inserted between
>    steps 3 and 4 while in system management mode.
>

I don't remember that, either.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
x86: remove pointless comments 2008-04-19T17:19:54+00:00 WANG Cong xiyou.wangcong@gmail.com 2008-03-08T10:15:06+00:00 cf9b111c170733dde39139e8989b676ec8b81573 Remove old comments that include the old arch/i386 directory. Signed-off-by: WANG Cong <xiyou.wangcong@gmail.com> Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> 
Remove old comments that include the old arch/i386 directory.

Signed-off-by: WANG Cong <xiyou.wangcong@gmail.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
x86 setup: use X86_CR0_PE macro instead of hard-coded constant 2008-01-30T12:33:02+00:00 H. Peter Anvin hpa@zytor.com 2008-01-30T12:33:02+00:00 02a7b425e82cd0052e5eaedbae81a522c6aae6c4 To set CR0.PE, use the X86_CR0_PE macro defined in <asm/processor-flags.h> instead of hardcoding it as a constant (1). Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> 
To set CR0.PE, use the X86_CR0_PE macro defined in
<asm/processor-flags.h> instead of hardcoding it as a constant (1).

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
x86 setup: initialize LDTR and TR to make life easier to Intel VT 2008-01-30T12:33:02+00:00 H. Peter Anvin hpa@zytor.com 2008-01-30T12:33:02+00:00 88089519f302f1296b4739be45699f06f728ec31 Intel VT doesn't like to engage when the protected-mode state isn't fully initialized. Make life easier for it by initializing LDTR (to null) and TR (to a dummy hunk of low memory which will never actually be touched.) Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> 
Intel VT doesn't like to engage when the protected-mode state isn't
fully initialized.  Make life easier for it by initializing LDTR (to
null) and TR (to a dummy hunk of low memory which will never actually
be touched.)

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
x86 setup: make PM transition more paranoid; cleanup 32-bit entry 2008-01-30T12:33:01+00:00 H. Peter Anvin hpa@zytor.com 2008-01-30T12:33:01+00:00 c4d9ba6da9f050ebb7e0d70769e3dca0fd45334f Make the transition to protected mode more paranoid by having back-to-back near jump (to synchronize the 386/486 prefetch queue) and far jump (to set up the code segment.) While we're at it, zero as many registers as practical (for future expandability of the 32-bit entry interface) and enter 32-bit mode with a valid stack. Note that the 32-bit code cannot rely on this stack, or we'll break all other existing users of the 32-bit entrypoint, but it may make debugging hacks easier to write. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> 
Make the transition to protected mode more paranoid by having
back-to-back near jump (to synchronize the 386/486 prefetch queue) and
far jump (to set up the code segment.)

While we're at it, zero as many registers as practical (for future
expandability of the 32-bit entry interface) and enter 32-bit mode
with a valid stack.  Note that the 32-bit code cannot rely on this
stack, or we'll break all other existing users of the 32-bit
entrypoint, but it may make debugging hacks easier to write.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
x86 setup: set %ebx == %ebp == %edi == 0 on protected mode entry 2007-11-05T03:48:04+00:00 H. Peter Anvin hpa@zytor.com 2007-11-05T01:54:31+00:00 9f259cc59ba45b8db401d60be9700e275676fb15 In accordance with the newly formalized 32-bit boot protocol, set %ebx == %ebp == %edi == 0 in order to support future extensions to the protocol. Signed-off-by: H. Peter Anvin <hpa@zytor.com> 
In accordance with the newly formalized 32-bit boot protocol, set
%ebx == %ebp == %edi == 0 in order to support future extensions to the
protocol.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
x86 setup: add a near jump to serialize %cr0 on 386/486 2007-11-05T03:47:46+00:00 H. Peter Anvin hpa@zytor.com 2007-11-05T01:50:12+00:00 7ed192906a2144ebc8ca2925a85d27b9c5355668 The 386 and 486 needs a jump immediately after setting %cr0 in order to serialize the pipeline. Signed-off-by: H. Peter Anvin <hpa@zytor.com> 
The 386 and 486 needs a jump immediately after setting %cr0 in order
to serialize the pipeline.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
i386: move boot 2007-10-11T09:16:45+00:00 Thomas Gleixner tglx@linutronix.de 2007-10-11T09:16:45+00:00 96ae6ea0be1b902c28b3b463c27da42b41e2b63a Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> 
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>