linux-toradex.git/arch/x86/include/asm/svm.h, branch v3.4.78

KVM: SVM: copy instruction bytes from VMCB

2011-01-12T09:31:07+00:00

In case of a nested page fault or an intercepted #PF newer SVM
implementations provide a copy of the faulting instruction bytes
in the VMCB.
Use these bytes to feed the instruction emulator and avoid the costly
guest instruction fetch in this case.

Signed-off-by: Andre Przywara 
Signed-off-by: Marcelo Tosatti

KVM: SVM: enhance MOV CR intercept handler

2011-01-12T09:31:03+00:00

Newer SVM implementations provide the GPR number in the VMCB, so
that the emulation path is no longer necesarry to handle CR
register access intercepts. Implement the handling in svm.c and
use it when the info is provided.

Signed-off-by: Andre Przywara 
Signed-off-by: Marcelo Tosatti

KVM: SVM: Add xsetbv intercept

2011-01-12T09:30:49+00:00

This patch implements the xsetbv intercept to the AMD part
of KVM. This makes AVX usable in a save way for the guest on
AVX capable AMD hardware.

The patch is tested by using AVX in the guest and host in
parallel and checking for data corruption. I also used the
KVM xsave unit-tests and they all pass.

Signed-off-by: Joerg Roedel 
Signed-off-by: Avi Kivity

KVM: SVM: Implement Flush-By-Asid feature

2011-01-12T09:30:45+00:00

This patch adds the new flush-by-asid of upcoming AMD
processors to the KVM-AMD module.

Signed-off-by: Joerg Roedel 
Signed-off-by: Avi Kivity

KVM: SVM: Add clean-bits infrastructure code

2011-01-12T09:30:22+00:00

This patch adds the infrastructure for the implementation of
the individual clean-bits.

Signed-off-by: Joerg Roedel 
Signed-off-by: Avi Kivity

KVM: SVM: Add manipulation functions for DRx intercepts

2011-01-12T09:30:11+00:00

This patch wraps changes to the DRx intercepts of SVM into
seperate functions to abstract nested-svm better and prepare
the implementation of the vmcb-clean-bits feature.

Signed-off-by: Joerg Roedel 
Signed-off-by: Marcelo Tosatti

KVM: SVM: Add manipulation functions for CRx intercepts

2011-01-12T09:30:10+00:00

This patch wraps changes to the CRx intercepts of SVM into
seperate functions to abstract nested-svm better and prepare
the implementation of the vmcb-clean-bits feature.

Signed-off-by: Joerg Roedel 
Signed-off-by: Marcelo Tosatti

KVM: x86: Push potential exception error code on task switches

2010-05-17T09:17:46+00:00

When a fault triggers a task switch, the error code, if existent, has to
be pushed on the new task's stack. Implement the missing bits.

Signed-off-by: Jan Kiszka 
Signed-off-by: Marcelo Tosatti

KVM: SVM: implement NEXTRIPsave SVM feature

2010-05-17T09:17:38+00:00

On SVM we set the instruction length of skipped instructions
to hard-coded, well known values, which could be wrong when (bogus,
but valid) prefixes (REX, segment override) are used.
Newer AMD processors (Fam10h 45nm and better, aka. PhenomII or
AthlonII) have an explicit NEXTRIP field in the VMCB containing the
desired information.
Since it is cheap to do so, we use this field to override the guessed
value on newer processors.
A fix for older CPUs would be rather expensive, as it would require
to fetch and partially decode the instruction. As the problem is not
a security issue and needs special, handcrafted code to trigger
(no compiler will ever generate such code), I omit a fix for older
CPUs.
If someone is interested, I have both a patch for these CPUs as well as
demo code triggering this issue: It segfaults under KVM, but runs
perfectly on native Linux.

Signed-off-by: Andre Przywara 
Signed-off-by: Marcelo Tosatti

KVM: SVM: Implement emulation of vm_cr msr

2010-04-25T10:53:14+00:00

This patch implements the emulation of the vm_cr msr for
nested svm.

Signed-off-by: Joerg Roedel 
Signed-off-by: Avi Kivity