<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/x86/kernel/amd_nb.c, branch v3.4.23</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci</title>
<updated>2012-01-12T02:50:26+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-01-12T02:50:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=7b67e751479d50b7f84d1a3cc5216eed5e534b66'/>
<id>7b67e751479d50b7f84d1a3cc5216eed5e534b66</id>
<content type='text'>
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits)
  x86/PCI: Expand the x86_msi_ops to have a restore MSIs.
  PCI: Increase resource array mask bit size in pcim_iomap_regions()
  PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES
  PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT)
  PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB
  x86/PCI: amd: factor out MMCONFIG discovery
  PCI: Enable ATS at the device state restore
  PCI: msi: fix imbalanced refcount of msi irq sysfs objects
  PCI: kconfig: English typo in pci/pcie/Kconfig
  PCI/PM/Runtime: make PCI traces quieter
  PCI: remove pci_create_bus()
  xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources
  x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()
  x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented()
  x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan
  sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources
  sparc/PCI: convert to pci_create_root_bus()
  sh/PCI: convert to pci_scan_root_bus() for correct root bus resources
  powerpc/PCI: convert to pci_create_root_bus()
  powerpc/PCI: split PHB part out of pcibios_map_io_space()
  ...

Fix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due
to the same patches being applied in other branches.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits)
  x86/PCI: Expand the x86_msi_ops to have a restore MSIs.
  PCI: Increase resource array mask bit size in pcim_iomap_regions()
  PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES
  PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT)
  PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB
  x86/PCI: amd: factor out MMCONFIG discovery
  PCI: Enable ATS at the device state restore
  PCI: msi: fix imbalanced refcount of msi irq sysfs objects
  PCI: kconfig: English typo in pci/pcie/Kconfig
  PCI/PM/Runtime: make PCI traces quieter
  PCI: remove pci_create_bus()
  xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources
  x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()
  x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented()
  x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan
  sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources
  sparc/PCI: convert to pci_create_root_bus()
  sh/PCI: convert to pci_scan_root_bus() for correct root bus resources
  powerpc/PCI: convert to pci_create_root_bus()
  powerpc/PCI: split PHB part out of pcibios_map_io_space()
  ...

Fix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due
to the same patches being applied in other branches.
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/PCI: amd: factor out MMCONFIG discovery</title>
<updated>2012-01-06T20:11:19+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2012-01-05T21:27:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=24d25dbfa63c376323096660bfa9ad45a08870ce'/>
<id>24d25dbfa63c376323096660bfa9ad45a08870ce</id>
<content type='text'>
This factors out the AMD native MMCONFIG discovery so we can use it
outside amd_bus.c.

amd_bus.c reads AMD MSRs so it can remove the MMCONFIG area from the
PCI resources.  We may also need the MMCONFIG information to work
around BIOS defects in the ACPI MCFG table.

Cc: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
Cc: Yinghai Lu &lt;yinghai@kernel.org&gt;
Cc: stable@kernel.org       # 2.6.34+
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This factors out the AMD native MMCONFIG discovery so we can use it
outside amd_bus.c.

amd_bus.c reads AMD MSRs so it can remove the MMCONFIG area from the
PCI resources.  We may also need the MMCONFIG information to work
around BIOS defects in the ACPI MCFG table.

Cc: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
Cc: Yinghai Lu &lt;yinghai@kernel.org&gt;
Cc: stable@kernel.org       # 2.6.34+
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Simplify code by removing a !SMP #ifdefs from 'struct cpuinfo_x86'</title>
<updated>2011-12-21T08:25:09+00:00</updated>
<author>
<name>Kevin Winchester</name>
<email>kjwinchester@gmail.com</email>
</author>
<published>2011-12-21T00:52:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=141168c36cdee3ff23d9c7700b0edc47cb65479f'/>
<id>141168c36cdee3ff23d9c7700b0edc47cb65479f</id>
<content type='text'>
Several fields in struct cpuinfo_x86 were not defined for the
!SMP case, likely to save space.  However, those fields still
have some meaning for UP, and keeping them allows some #ifdef
removal from other files.  The additional size of the UP kernel
from this change is not significant enough to worry about
keeping up the distinction:

	   text    data     bss     dec     hex filename
	4737168	 506459	 972040	6215667	 5ed7f3	vmlinux.o.before
	4737444	 506459	 972040	6215943	 5ed907	vmlinux.o.after

for a difference of 276 bytes for an example UP config.

If someone wants those 276 bytes back badly then it should
be implemented in a cleaner way.

Signed-off-by: Kevin Winchester &lt;kjwinchester@gmail.com&gt;
Cc: Steffen Persvold &lt;sp@numascale.com&gt;
Link: http://lkml.kernel.org/r/1324428742-12498-1-git-send-email-kjwinchester@gmail.com
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Several fields in struct cpuinfo_x86 were not defined for the
!SMP case, likely to save space.  However, those fields still
have some meaning for UP, and keeping them allows some #ifdef
removal from other files.  The additional size of the UP kernel
from this change is not significant enough to worry about
keeping up the distinction:

	   text    data     bss     dec     hex filename
	4737168	 506459	 972040	6215667	 5ed7f3	vmlinux.o.before
	4737444	 506459	 972040	6215943	 5ed907	vmlinux.o.after

for a difference of 276 bytes for an example UP config.

If someone wants those 276 bytes back badly then it should
be implemented in a cleaner way.

Signed-off-by: Kevin Winchester &lt;kjwinchester@gmail.com&gt;
Cc: Steffen Persvold &lt;sp@numascale.com&gt;
Link: http://lkml.kernel.org/r/1324428742-12498-1-git-send-email-kjwinchester@gmail.com
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, amd-nb: Rename CPU PCI id define for F4</title>
<updated>2011-03-31T06:51:38+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@amd64.org</email>
</author>
<published>2011-03-30T18:34:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cb6c8520f6f6bba7b7e1a6de3360a8edfd8243b6'/>
<id>cb6c8520f6f6bba7b7e1a6de3360a8edfd8243b6</id>
<content type='text'>
With increasing number of PCI function ids, add the PCI function
id in the define name instead of its symbolic name in the BKDG
for more clarity. This renames function 4 define.

Signed-off-by: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
Cc: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
LKML-Reference: &lt;20110330183447.GA3668@aftab&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With increasing number of PCI function ids, add the PCI function
id in the define name instead of its symbolic name in the BKDG
for more clarity. This renames function 4 define.

Signed-off-by: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
Cc: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
LKML-Reference: &lt;20110330183447.GA3668@aftab&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp</title>
<updated>2011-03-18T00:21:32+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2011-03-18T00:21:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=978ca164bd9f30bd51f71dad86d8c3797f7add76'/>
<id>978ca164bd9f30bd51f71dad86d8c3797f7add76</id>
<content type='text'>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (38 commits)
  amd64_edac: Fix decode_syndrome types
  amd64_edac: Fix DCT argument type
  amd64_edac: Fix ranges signedness
  amd64_edac: Drop local variable
  amd64_edac: Fix PCI config addressing types
  amd64_edac: Fix DRAM base macros
  amd64_edac: Fix node id signedness
  amd64_edac: Drop redundant declarations
  amd64_edac: Enable driver on F15h
  amd64_edac: Adjust ECC symbol size to F15h
  amd64_edac: Simplify scrubrate setting
  PCI: Rename CPU PCI id define
  amd64_edac: Improve DRAM address mapping
  amd64_edac: Sanitize -&gt;read_dram_ctl_register
  amd64_edac: Adjust sys_addr to chip select conversion routine to F15h
  amd64_edac: Beef up early exit reporting
  amd64_edac: Revamp online spare handling
  amd64_edac: Fix channel interleave removal
  amd64_edac: Correct node interleaving removal
  amd64_edac: Add support for interleaved region swapping
  ...

Fix up trivial conflict in include/linux/pci_ids.h due to
AMD_15H_NB_MISC being renamed as AMD_15H_NB_F3 next to the new
AMD_15H_NB_LINK entry.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (38 commits)
  amd64_edac: Fix decode_syndrome types
  amd64_edac: Fix DCT argument type
  amd64_edac: Fix ranges signedness
  amd64_edac: Drop local variable
  amd64_edac: Fix PCI config addressing types
  amd64_edac: Fix DRAM base macros
  amd64_edac: Fix node id signedness
  amd64_edac: Drop redundant declarations
  amd64_edac: Enable driver on F15h
  amd64_edac: Adjust ECC symbol size to F15h
  amd64_edac: Simplify scrubrate setting
  PCI: Rename CPU PCI id define
  amd64_edac: Improve DRAM address mapping
  amd64_edac: Sanitize -&gt;read_dram_ctl_register
  amd64_edac: Adjust sys_addr to chip select conversion routine to F15h
  amd64_edac: Beef up early exit reporting
  amd64_edac: Revamp online spare handling
  amd64_edac: Fix channel interleave removal
  amd64_edac: Correct node interleaving removal
  amd64_edac: Add support for interleaved region swapping
  ...

Fix up trivial conflict in include/linux/pci_ids.h due to
AMD_15H_NB_MISC being renamed as AMD_15H_NB_F3 next to the new
AMD_15H_NB_LINK entry.
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Rename CPU PCI id define</title>
<updated>2011-03-17T13:46:25+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>borislav.petkov@amd.com</email>
</author>
<published>2011-01-19T17:22:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cb293250c71fa85de3ef378d7383ddecf248c32d'/>
<id>cb293250c71fa85de3ef378d7383ddecf248c32d</id>
<content type='text'>
With increasing number of PCI function ids, add the PCI function id
in the define name instead of its symbolic name in the BKDG for more
clarity.

Acked-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Acked-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
Signed-off-by: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With increasing number of PCI function ids, add the PCI function id
in the define name instead of its symbolic name in the BKDG for more
clarity.

Acked-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Acked-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
Signed-off-by: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, amd-nb: Misc cleanliness fixes</title>
<updated>2011-03-03T12:06:20+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@amd64.org</email>
</author>
<published>2011-03-03T11:59:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=84fd1d35cc868a4f7590b6dbdae2d7761287b97a'/>
<id>84fd1d35cc868a4f7590b6dbdae2d7761287b97a</id>
<content type='text'>
Make functions used strictly in bool context return bool. Also,
fixup used types and comments, and make a local function static,
while at it.

Signed-off-by: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
Cc: Borislav Petkov &lt;bp@amd64.org&gt;
LKML-Reference: &lt;20110303115932.GA8603@aftab&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Make functions used strictly in bool context return bool. Also,
fixup used types and comments, and make a local function static,
while at it.

Signed-off-by: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
Cc: Borislav Petkov &lt;bp@amd64.org&gt;
LKML-Reference: &lt;20110303115932.GA8603@aftab&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Adjust section placement in AMD northbridge related code</title>
<updated>2011-02-10T12:32:52+00:00</updated>
<author>
<name>Jan Beulich</name>
<email>JBeulich@novell.com</email>
</author>
<published>2011-02-09T08:26:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=691269f0d918cd72454c254f97722f194c07b9a8'/>
<id>691269f0d918cd72454c254f97722f194c07b9a8</id>
<content type='text'>
amd_nb_misc_ids[] can live in .rodata, and enable_pci_io_ecs()
can be moved into .cpuinit.text.

Signed-off-by: Jan Beulich &lt;jbeulich@novell.com&gt;
Cc: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
Cc: Andreas Herrmann &lt;Andreas.Herrmann3@amd.com&gt;
Cc: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
LKML-Reference: &lt;4D525DDD0200007800030F07@vpn.id2.novell.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
amd_nb_misc_ids[] can live in .rodata, and enable_pci_io_ecs()
can be moved into .cpuinit.text.

Signed-off-by: Jan Beulich &lt;jbeulich@novell.com&gt;
Cc: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
Cc: Andreas Herrmann &lt;Andreas.Herrmann3@amd.com&gt;
Cc: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
LKML-Reference: &lt;4D525DDD0200007800030F07@vpn.id2.novell.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUs</title>
<updated>2011-02-07T18:16:22+00:00</updated>
<author>
<name>Hans Rosenfeld</name>
<email>hans.rosenfeld@amd.com</email>
</author>
<published>2011-02-07T17:10:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cabb5bd7ff4d6963ec9e67f958fc30e7815425e6'/>
<id>cabb5bd7ff4d6963ec9e67f958fc30e7815425e6</id>
<content type='text'>
L3 Cache Partitioning allows selecting which of the 4 L3 subcaches can be used
for evictions by the L2 cache of each compute unit. By writing a 4-bit
hexadecimal mask into the the sysfs file
/sys/devices/system/cpu/cpuX/cache/index3/subcaches, the user can set the
enabled subcaches for a CPU.

The settings are directly read from and written to the hardware, so there is no
way to have contradicting settings for two CPUs belonging to the same compute
unit. Writing will always overwrite any previous setting for a compute unit.

Signed-off-by: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
Cc: &lt;Andreas.Herrmann3@amd.com&gt;
LKML-Reference: &lt;1297098639-431383-1-git-send-email-hans.rosenfeld@amd.com&gt;
[ -v3: minor style fixes ]
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
L3 Cache Partitioning allows selecting which of the 4 L3 subcaches can be used
for evictions by the L2 cache of each compute unit. By writing a 4-bit
hexadecimal mask into the the sysfs file
/sys/devices/system/cpu/cpuX/cache/index3/subcaches, the user can set the
enabled subcaches for a CPU.

The settings are directly read from and written to the hardware, so there is no
way to have contradicting settings for two CPUs belonging to the same compute
unit. Writing will always overwrite any previous setting for a compute unit.

Signed-off-by: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
Cc: &lt;Andreas.Herrmann3@amd.com&gt;
LKML-Reference: &lt;1297098639-431383-1-git-send-email-hans.rosenfeld@amd.com&gt;
[ -v3: minor style fixes ]
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, amd: Extend AMD northbridge caching code to support "Link Control" devices</title>
<updated>2011-01-26T07:28:23+00:00</updated>
<author>
<name>Hans Rosenfeld</name>
<email>hans.rosenfeld@amd.com</email>
</author>
<published>2011-01-24T15:05:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=41b2610c3443e6c4760e61fc10eef73f96f9f6a5'/>
<id>41b2610c3443e6c4760e61fc10eef73f96f9f6a5</id>
<content type='text'>
"Link Control" devices (NB function 4) will be used by L3 cache
partitioning on family 0x15.

Signed-off-by: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
Cc: &lt;andreas.herrmann3@amd.com&gt;
LKML-Reference: &lt;1295881543-572552-4-git-send-email-hans.rosenfeld@amd.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
"Link Control" devices (NB function 4) will be used by L3 cache
partitioning on family 0x15.

Signed-off-by: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
Cc: &lt;andreas.herrmann3@amd.com&gt;
LKML-Reference: &lt;1295881543-572552-4-git-send-email-hans.rosenfeld@amd.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
</feed>
