linux-toradex.git/arch/x86/kernel/amd_nb.c, branch v4.2.7

x86/gart: Check for GART support before accessing GART registers

2015-05-06T09:15:53+00:00

GART registers are not present in newer AMD processors (Fam15h, Model
10h and later). So, avoid accessing those in PCI config space by
returning early in early_gart_iommu_check() and gart_iommu_hole_init()
if GART is not available.

Current code doesn't break on existing processors but there are some
side effects:

We get bogus AGP aperture messages which are simply noise on
GART-less processors:

  AGP: Node 0: aperture [bus addr 0x00000000-0x01ffffff] (32MB)
  AGP: Your BIOS doesn't leave aperture memory hole
  AGP: Please enable the IOMMU option in the BIOS setup
  AGP: This costs you 64MB of RAM
  AGP: Mapping aperture over RAM [mem 0xd4000000-0xd7ffffff]

We can avoid calling allocate_aperture() and would not have to
wastefully reserve 64MB of RAM with memblock_reserve(). Also, we can
avoid having to loop through all PCI buses and devices twice, searching
for a non-existent AGP bridge if we bail out early.

Refactor the family check used in amd_nb.c into an inline function so we
can use it here as well as in amd_nb.c

Fix some typos while at it.

Tested the patch on Fam10h and Fam15h Model 00h-fh and this code runs
fine. On Fam15h Model 60h-6fh and on Fam16h, we bail early as they don't
have GART.

Signed-off-by: Aravind Gopalakrishnan 
Signed-off-by: Borislav Petkov 
Reviewed-by: Suravee Suthikulpanit 
Cc: Bjorn Helgaas 
Cc: Borislav Petkov 
Cc: H. Peter Anvin 
Cc: Joerg Rodel 
Cc: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1428443197-3834-1-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Ingo Molnar

x86, amd_nb: Add device IDs to NB tables for F15h M60h

2014-10-20T12:18:45+00:00

Add F3 and F4 PCI device IDs to amd_nb_misc_ids[] and
amd_nb_link_ids[] respectively.

Signed-off-by: Aravind Gopalakrishnan 
Acked-by: Thomas Gleixner 
Link: http://lkml.kernel.org/r/1411070205-10217-1-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Borislav Petkov

Merge tag 'edac_for_3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

2014-04-01T20:54:00+00:00

Pull EDAC updates from Borislav Petkov:
 "A bunch of EDAC updates all over the place:

   - Support for new AMD models, along with more graceful fallback for
     unsupported hw.

   - Bunch of fixes from SUSE accumulated from bug reports

   - Misc other fixes and cleanups"

* tag 'edac_for_3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  amd64_edac: Add support for newer F16h models
  i7core_edac: Drop unused variable
  i82875p_edac: Drop redundant call to pci_get_device()
  amd8111_edac: Fix leaks in probe error paths
  e752x_edac: Drop pvt->bridge_ck
  MCE, AMD: Fix decoding module loading on unsupported hw
  i5100_edac: Remove an unneeded condition in i5100_init_csrows()
  sb_edac: Degrade log level for device registration
  amd64_edac: Fix logic to determine channel for F15 M30h processors
  edac/85xx: Remove deprecated IRQF_DISABLED
  i3200_edac: Add a missing pci_disable_device() on the exit path
  i5400_edac: Disable device when unloading module
  e752x_edac: Simplify call to pci_get_device()

amd64_edac: Add support for newer F16h models

2014-02-27T17:03:16+00:00

Extend ECC decoding support for F16h M30h. Tested on F16h M30h with ECC
turned on using mce_amd_inj module and the patch works fine.

Signed-off-by: Aravind Gopalakrishnan 
Link: http://lkml.kernel.org/r/1392913726-16961-1-git-send-email-Aravind.Gopalakrishnan@amd.com
Tested-by: Arindam Nath 
Acked-by: H. Peter Anvin 
Signed-off-by: Borislav Petkov

x86/AMD/NB: Fix amd_set_subcaches() parameter type

2014-01-25T07:50:09+00:00

This is under CAP_SYS_ADMIN, but Smatch complains that mask comes
from the user and the test for "mask > 0xf" can underflow.

The fix is simple: amd_set_subcaches() should hand down not an 'int'
but an 'unsigned long' like it was originally indended to do.

Signed-off-by: Dan Carpenter 
Acked-by: Borislav Petkov 
Cc: Borislav Petkov 
Cc: Daniel J Blueman 
Link: http://lkml.kernel.org/r/20140121072209.GA22095@elgon.mountain
Signed-off-by: Ingo Molnar

x86, amd_nb: Clarify F15h, model 30h GART and L3 support

2013-08-12T13:30:08+00:00

F15h, models 0x30 and later don't have a GART. Note that. Also check
CPUID leaf 0x80000006 for L3 prescence because there are models which
don't sport an L3 cache.

Signed-off-by: Aravind Gopalakrishnan 
[ Boris: rewrite commit message, cleanup comments. ]
Signed-off-by: Borislav Petkov

Merge branch 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2013-04-30T15:42:45+00:00

Pull x86 RAS changes from Ingo Molnar:

 - Add an Intel CMCI hotplug fix

 - Add AMD family 16h EDAC support

 - Make the AMD MCE banks code more flexible for virtual environments

* 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  amd64_edac: Add Family 16h support
  x86/mce: Rework cmci_rediscover() to play well with CPU hotplug
  x86, MCE, AMD: Use MCG_CAP MSR to find out number of banks on AMD
  x86, MCE, AMD: Replace shared_bank array with is_shared_bank() helper

amd64_edac: Add Family 16h support

2013-04-19T10:46:50+00:00

Add code to handle DRAM ECC errors decoding for Fam16h.

Tested on Fam16h with ECC turned on using the mce_amd_inj facility and
works fine.

Signed-off-by: Aravind Gopalakrishnan 
[ Boris: cleanups and clarifications ]
Signed-off-by: Borislav Petkov

x86: Constify a few items

2013-03-11T14:11:03+00:00

This in particular re-does the compiler warning fix 9faec5b
("perf/x86: Fix P6 driver section warning"), tightening the
section attributes rather than relaxing them.

Signed-off-by: Jan Beulich 
Cc: Shaun Ruffell 
Cc: yangyongqiang 
Cc: Cyrill Gorcunov 
Cc: Vince Weaver 
Link: http://lkml.kernel.org/r/513DB84502000078000C4880@nat28.tlf.novell.com
Signed-off-by: Ingo Molnar

Merge branch 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2012-07-22T23:07:45+00:00

Pull x86/mce changes from Ingo Molnar:
 "This tree improves the AMD thresholding bank code and includes a
  memory fault signal handling fixlet."

* 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mce: Fix siginfo_t->si_addr value for non-recoverable memory faults
  x86, MCE, AMD: Update copyrights and boilerplate
  x86, MCE, AMD: Give proper names to the thresholding banks
  x86, MCE, AMD: Make error_count read only
  x86, MCE, AMD: Cleanup reading of error_count
  x86, MCE, AMD: Print decimal thresholding values
  x86, MCE, AMD: Move shared bank to node descriptor
  x86, MCE, AMD: Remove local_allocate_... wrapper
  x86, MCE, AMD: Remove shared banks sysfs linking
  x86, amd_nb: Export model 0x10 and later PCI id