<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/x86/kernel/cpu, branch v4.2.7</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>x86/cpu: Fix SMAP check in PVOPS environments</title>
<updated>2015-12-09T19:31:13+00:00</updated>
<author>
<name>Andrew Cooper</name>
<email>andrew.cooper3@citrix.com</email>
</author>
<published>2015-06-03T09:31:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=36e5b70aeab1fb56bb06c597ea26e325871d4cb3'/>
<id>36e5b70aeab1fb56bb06c597ea26e325871d4cb3</id>
<content type='text'>
commit 581b7f158fe0383b492acd1ce3fb4e99d4e57808 upstream.

There appears to be no formal statement of what pv_irq_ops.save_fl() is
supposed to return precisely.  Native returns the full flags, while lguest and
Xen only return the Interrupt Flag, and both have comments by the
implementations stating that only the Interrupt Flag is looked at.  This may
have been true when initially implemented, but no longer is.

To make matters worse, the Xen PVOP leaves the upper bits undefined, making
the BUG_ON() undefined behaviour.  Experimentally, this now trips for 32bit PV
guests on Broadwell hardware.  The BUG_ON() is consistent for an individual
build, but not consistent for all builds.  It has also been a sitting timebomb
since SMAP support was introduced.

Use native_save_fl() instead, which will obtain an accurate view of the AC
flag.

Signed-off-by: Andrew Cooper &lt;andrew.cooper3@citrix.com&gt;
Reviewed-by: David Vrabel &lt;david.vrabel@citrix.com&gt;
Tested-by: Rusty Russell &lt;rusty@rustcorp.com.au&gt;
Cc: Rusty Russell &lt;rusty@rustcorp.com.au&gt;
Cc: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
Cc: Boris Ostrovsky &lt;boris.ostrovsky@oracle.com&gt;
Cc: &lt;lguest@lists.ozlabs.org&gt;
Cc: Xen-devel &lt;xen-devel@lists.xen.org&gt;
Link: http://lkml.kernel.org/r/1433323874-6927-1-git-send-email-andrew.cooper3@citrix.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 581b7f158fe0383b492acd1ce3fb4e99d4e57808 upstream.

There appears to be no formal statement of what pv_irq_ops.save_fl() is
supposed to return precisely.  Native returns the full flags, while lguest and
Xen only return the Interrupt Flag, and both have comments by the
implementations stating that only the Interrupt Flag is looked at.  This may
have been true when initially implemented, but no longer is.

To make matters worse, the Xen PVOP leaves the upper bits undefined, making
the BUG_ON() undefined behaviour.  Experimentally, this now trips for 32bit PV
guests on Broadwell hardware.  The BUG_ON() is consistent for an individual
build, but not consistent for all builds.  It has also been a sitting timebomb
since SMAP support was introduced.

Use native_save_fl() instead, which will obtain an accurate view of the AC
flag.

Signed-off-by: Andrew Cooper &lt;andrew.cooper3@citrix.com&gt;
Reviewed-by: David Vrabel &lt;david.vrabel@citrix.com&gt;
Tested-by: Rusty Russell &lt;rusty@rustcorp.com.au&gt;
Cc: Rusty Russell &lt;rusty@rustcorp.com.au&gt;
Cc: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
Cc: Boris Ostrovsky &lt;boris.ostrovsky@oracle.com&gt;
Cc: &lt;lguest@lists.ozlabs.org&gt;
Cc: Xen-devel &lt;xen-devel@lists.xen.org&gt;
Link: http://lkml.kernel.org/r/1433323874-6927-1-git-send-email-andrew.cooper3@citrix.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86/intel: Fix constraint access</title>
<updated>2015-10-22T21:49:14+00:00</updated>
<author>
<name>Peter Zijlstra</name>
<email>peterz@infradead.org</email>
</author>
<published>2015-09-10T09:58:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d78a2be4f9a1b9a31dff96e17d175860c30db4c2'/>
<id>d78a2be4f9a1b9a31dff96e17d175860c30db4c2</id>
<content type='text'>
commit ebfb4988f0378e2ac3b4a0aa1ea20d724293f392 upstream.

Sasha reported that we can get here with .idx==-1, and
cpuc-&gt;event_constraints unallocated.

Suggested-by: Stephane Eranian &lt;eranian@google.com&gt;
Reported-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Fixes: b371b5943178 ("perf/x86: Fix event/group validation")
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit ebfb4988f0378e2ac3b4a0aa1ea20d724293f392 upstream.

Sasha reported that we can get here with .idx==-1, and
cpuc-&gt;event_constraints unallocated.

Suggested-by: Stephane Eranian &lt;eranian@google.com&gt;
Reported-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Fixes: b371b5943178 ("perf/x86: Fix event/group validation")
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>x86/mce: Reenable CMCI banks when swiching back to interrupt mode</title>
<updated>2015-09-21T17:10:57+00:00</updated>
<author>
<name>Xie XiuQi</name>
<email>xiexiuqi@huawei.com</email>
</author>
<published>2015-08-12T16:29:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f9d75f0e681f44d01621b3a80cf9407433d0e2ad'/>
<id>f9d75f0e681f44d01621b3a80cf9407433d0e2ad</id>
<content type='text'>
commit 1b48465500611a2dc5e75800c61ac352e22d41c3 upstream.

Zhang Liguang reported the following issue:

1) System detects a CMCI storm on the current CPU.

2) Kernel disables the CMCI interrupt on banks owned by the
   current CPU and switches to poll mode

3) After the CMCI storm subsides, kernel switches back to
   interrupt mode

4) We expect the system to reenable the CMCI interrupt on banks
   owned by the current CPU

   mce_intel_adjust_timer
   |-&gt; cmci_reenable
       |-&gt; cmci_discover     # owned banks are ignored here

  static void cmci_discover(int banks)
	...
	for (i = 0; i &lt; banks; i++) {
		...
		if (test_bit(i, owned))	# ownd banks is ignore here
			continue;

So convert cmci_storm_disable_banks() to
cmci_toggle_interrupt_mode() which controls whether to enable or
disable CMCI interrupts with its argument.

NB: We cannot clear the owned bit because the banks won't be
polled, otherwise. See:

  27f6c573e0f7 ("x86, CMCI: Add proper detection of end of CMCI storms")

for more info.

Reported-by: Zhang Liguang &lt;zhangliguang@huawei.com&gt;
Signed-off-by: Xie XiuQi &lt;xiexiuqi@huawei.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Cc: huawei.libin@huawei.com
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: rui.xiang@huawei.com
Link: http://lkml.kernel.org/r/1439396985-12812-10-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 1b48465500611a2dc5e75800c61ac352e22d41c3 upstream.

Zhang Liguang reported the following issue:

1) System detects a CMCI storm on the current CPU.

2) Kernel disables the CMCI interrupt on banks owned by the
   current CPU and switches to poll mode

3) After the CMCI storm subsides, kernel switches back to
   interrupt mode

4) We expect the system to reenable the CMCI interrupt on banks
   owned by the current CPU

   mce_intel_adjust_timer
   |-&gt; cmci_reenable
       |-&gt; cmci_discover     # owned banks are ignored here

  static void cmci_discover(int banks)
	...
	for (i = 0; i &lt; banks; i++) {
		...
		if (test_bit(i, owned))	# ownd banks is ignore here
			continue;

So convert cmci_storm_disable_banks() to
cmci_toggle_interrupt_mode() which controls whether to enable or
disable CMCI interrupts with its argument.

NB: We cannot clear the owned bit because the banks won't be
polled, otherwise. See:

  27f6c573e0f7 ("x86, CMCI: Add proper detection of end of CMCI storms")

for more info.

Reported-by: Zhang Liguang &lt;zhangliguang@huawei.com&gt;
Signed-off-by: Xie XiuQi &lt;xiexiuqi@huawei.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Cc: huawei.libin@huawei.com
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: rui.xiang@huawei.com
Link: http://lkml.kernel.org/r/1439396985-12812-10-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2015-08-14T17:57:16+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-08-14T17:57:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b25c6cee55c720e5e8502aa37104409aacd16ad3'/>
<id>b25c6cee55c720e5e8502aa37104409aacd16ad3</id>
<content type='text'>
Pull perf fixes from Ingo Molnar:
 "Misc fixes: PMU driver corner cases, tooling fixes, and an 'AUX'
  (Intel PT) race related core fix"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86/intel/cqm: Do not access cpu_data() from CPU_UP_PREPARE handler
  perf/x86/intel: Fix memory leak on hot-plug allocation fail
  perf: Fix PERF_EVENT_IOC_PERIOD migration race
  perf: Fix double-free of the AUX buffer
  perf: Fix fasync handling on inherited events
  perf tools: Fix test build error when bindir contains double slash
  perf stat: Fix transaction lenght metrics
  perf: Fix running time accounting
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull perf fixes from Ingo Molnar:
 "Misc fixes: PMU driver corner cases, tooling fixes, and an 'AUX'
  (Intel PT) race related core fix"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86/intel/cqm: Do not access cpu_data() from CPU_UP_PREPARE handler
  perf/x86/intel: Fix memory leak on hot-plug allocation fail
  perf: Fix PERF_EVENT_IOC_PERIOD migration race
  perf: Fix double-free of the AUX buffer
  perf: Fix fasync handling on inherited events
  perf tools: Fix test build error when bindir contains double slash
  perf stat: Fix transaction lenght metrics
  perf: Fix running time accounting
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86/intel/cqm: Do not access cpu_data() from CPU_UP_PREPARE handler</title>
<updated>2015-08-12T09:37:23+00:00</updated>
<author>
<name>Matt Fleming</name>
<email>matt.fleming@intel.com</email>
</author>
<published>2015-08-06T12:12:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d7a702f0b1033cf402fef65bd6395072738f0844'/>
<id>d7a702f0b1033cf402fef65bd6395072738f0844</id>
<content type='text'>
Tony reports that booting his 144-cpu machine with maxcpus=10 triggers
the following WARN_ON():

[   21.045727] WARNING: CPU: 8 PID: 647 at arch/x86/kernel/cpu/perf_event_intel_cqm.c:1267 intel_cqm_cpu_prepare+0x75/0x90()
[   21.045744] CPU: 8 PID: 647 Comm: systemd-udevd Not tainted 4.2.0-rc4 #1
[   21.045745] Hardware name: Intel Corporation BRICKLAND/BRICKLAND, BIOS BRHSXSD1.86B.0066.R00.1506021730 06/02/2015
[   21.045747]  0000000000000000 0000000082771b09 ffff880856333ba8 ffffffff81669b67
[   21.045748]  0000000000000000 0000000000000000 ffff880856333be8 ffffffff8107b02a
[   21.045750]  ffff88085b789800 ffff88085f68a020 ffffffff819e2470 000000000000000a
[   21.045750] Call Trace:
[   21.045757]  [&lt;ffffffff81669b67&gt;] dump_stack+0x45/0x57
[   21.045759]  [&lt;ffffffff8107b02a&gt;] warn_slowpath_common+0x8a/0xc0
[   21.045761]  [&lt;ffffffff8107b15a&gt;] warn_slowpath_null+0x1a/0x20
[   21.045762]  [&lt;ffffffff81036725&gt;] intel_cqm_cpu_prepare+0x75/0x90
[   21.045764]  [&lt;ffffffff81036872&gt;] intel_cqm_cpu_notifier+0x42/0x160
[   21.045767]  [&lt;ffffffff8109a33d&gt;] notifier_call_chain+0x4d/0x80
[   21.045769]  [&lt;ffffffff8109a44e&gt;] __raw_notifier_call_chain+0xe/0x10
[   21.045770]  [&lt;ffffffff8107b538&gt;] _cpu_up+0xe8/0x190
[   21.045771]  [&lt;ffffffff8107b65a&gt;] cpu_up+0x7a/0xa0
[   21.045774]  [&lt;ffffffff8165e920&gt;] cpu_subsys_online+0x40/0x90
[   21.045777]  [&lt;ffffffff81433b37&gt;] device_online+0x67/0x90
[   21.045778]  [&lt;ffffffff81433bea&gt;] online_store+0x8a/0xa0
[   21.045782]  [&lt;ffffffff81430e78&gt;] dev_attr_store+0x18/0x30
[   21.045785]  [&lt;ffffffff8126b6ba&gt;] sysfs_kf_write+0x3a/0x50
[   21.045786]  [&lt;ffffffff8126ad40&gt;] kernfs_fop_write+0x120/0x170
[   21.045789]  [&lt;ffffffff811f0b77&gt;] __vfs_write+0x37/0x100
[   21.045791]  [&lt;ffffffff811f38b8&gt;] ? __sb_start_write+0x58/0x110
[   21.045795]  [&lt;ffffffff81296d2d&gt;] ? security_file_permission+0x3d/0xc0
[   21.045796]  [&lt;ffffffff811f1279&gt;] vfs_write+0xa9/0x190
[   21.045797]  [&lt;ffffffff811f2075&gt;] SyS_write+0x55/0xc0
[   21.045800]  [&lt;ffffffff81067300&gt;] ? do_page_fault+0x30/0x80
[   21.045804]  [&lt;ffffffff816709ae&gt;] entry_SYSCALL_64_fastpath+0x12/0x71
[   21.045805] ---[ end trace fe228b836d8af405 ]---

The root cause is that CPU_UP_PREPARE is completely the wrong notifier
action from which to access cpu_data(), because smp_store_cpu_info()
won't have been executed by the target CPU at that point, which in turn
means that -&gt;x86_cache_max_rmid and -&gt;x86_cache_occ_scale haven't been
filled out.

Instead let's invoke our handler from CPU_STARTING and rename it
appropriately.

Reported-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Matt Fleming &lt;matt.fleming@intel.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Kanaka Juvva &lt;kanaka.d.juvva@intel.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Vikas Shivappa &lt;vikas.shivappa@intel.com&gt;
Link: http://lkml.kernel.org/r/1438863163-14083-1-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tony reports that booting his 144-cpu machine with maxcpus=10 triggers
the following WARN_ON():

[   21.045727] WARNING: CPU: 8 PID: 647 at arch/x86/kernel/cpu/perf_event_intel_cqm.c:1267 intel_cqm_cpu_prepare+0x75/0x90()
[   21.045744] CPU: 8 PID: 647 Comm: systemd-udevd Not tainted 4.2.0-rc4 #1
[   21.045745] Hardware name: Intel Corporation BRICKLAND/BRICKLAND, BIOS BRHSXSD1.86B.0066.R00.1506021730 06/02/2015
[   21.045747]  0000000000000000 0000000082771b09 ffff880856333ba8 ffffffff81669b67
[   21.045748]  0000000000000000 0000000000000000 ffff880856333be8 ffffffff8107b02a
[   21.045750]  ffff88085b789800 ffff88085f68a020 ffffffff819e2470 000000000000000a
[   21.045750] Call Trace:
[   21.045757]  [&lt;ffffffff81669b67&gt;] dump_stack+0x45/0x57
[   21.045759]  [&lt;ffffffff8107b02a&gt;] warn_slowpath_common+0x8a/0xc0
[   21.045761]  [&lt;ffffffff8107b15a&gt;] warn_slowpath_null+0x1a/0x20
[   21.045762]  [&lt;ffffffff81036725&gt;] intel_cqm_cpu_prepare+0x75/0x90
[   21.045764]  [&lt;ffffffff81036872&gt;] intel_cqm_cpu_notifier+0x42/0x160
[   21.045767]  [&lt;ffffffff8109a33d&gt;] notifier_call_chain+0x4d/0x80
[   21.045769]  [&lt;ffffffff8109a44e&gt;] __raw_notifier_call_chain+0xe/0x10
[   21.045770]  [&lt;ffffffff8107b538&gt;] _cpu_up+0xe8/0x190
[   21.045771]  [&lt;ffffffff8107b65a&gt;] cpu_up+0x7a/0xa0
[   21.045774]  [&lt;ffffffff8165e920&gt;] cpu_subsys_online+0x40/0x90
[   21.045777]  [&lt;ffffffff81433b37&gt;] device_online+0x67/0x90
[   21.045778]  [&lt;ffffffff81433bea&gt;] online_store+0x8a/0xa0
[   21.045782]  [&lt;ffffffff81430e78&gt;] dev_attr_store+0x18/0x30
[   21.045785]  [&lt;ffffffff8126b6ba&gt;] sysfs_kf_write+0x3a/0x50
[   21.045786]  [&lt;ffffffff8126ad40&gt;] kernfs_fop_write+0x120/0x170
[   21.045789]  [&lt;ffffffff811f0b77&gt;] __vfs_write+0x37/0x100
[   21.045791]  [&lt;ffffffff811f38b8&gt;] ? __sb_start_write+0x58/0x110
[   21.045795]  [&lt;ffffffff81296d2d&gt;] ? security_file_permission+0x3d/0xc0
[   21.045796]  [&lt;ffffffff811f1279&gt;] vfs_write+0xa9/0x190
[   21.045797]  [&lt;ffffffff811f2075&gt;] SyS_write+0x55/0xc0
[   21.045800]  [&lt;ffffffff81067300&gt;] ? do_page_fault+0x30/0x80
[   21.045804]  [&lt;ffffffff816709ae&gt;] entry_SYSCALL_64_fastpath+0x12/0x71
[   21.045805] ---[ end trace fe228b836d8af405 ]---

The root cause is that CPU_UP_PREPARE is completely the wrong notifier
action from which to access cpu_data(), because smp_store_cpu_info()
won't have been executed by the target CPU at that point, which in turn
means that -&gt;x86_cache_max_rmid and -&gt;x86_cache_occ_scale haven't been
filled out.

Instead let's invoke our handler from CPU_STARTING and rename it
appropriately.

Reported-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Matt Fleming &lt;matt.fleming@intel.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Kanaka Juvva &lt;kanaka.d.juvva@intel.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Vikas Shivappa &lt;vikas.shivappa@intel.com&gt;
Link: http://lkml.kernel.org/r/1438863163-14083-1-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86/intel: Fix memory leak on hot-plug allocation fail</title>
<updated>2015-08-12T09:37:22+00:00</updated>
<author>
<name>Peter Zijlstra</name>
<email>peterz@infradead.org</email>
</author>
<published>2015-08-10T12:17:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=dbc72b7a0c673ff00fdeb21d3a26064e2185baf4'/>
<id>dbc72b7a0c673ff00fdeb21d3a26064e2185baf4</id>
<content type='text'>
We fail to free the shared_regs allocation if the constraint_list
allocation fails.

Cure this and be more consistent in NULL-ing the pointers after free.

Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Stephane Eranian &lt;eranian@google.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We fail to free the shared_regs allocation if the constraint_list
allocation fails.

Cure this and be more consistent in NULL-ing the pointers after free.

Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Stephane Eranian &lt;eranian@google.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/ldt: Make modify_ldt synchronous</title>
<updated>2015-07-31T08:23:23+00:00</updated>
<author>
<name>Andy Lutomirski</name>
<email>luto@kernel.org</email>
</author>
<published>2015-07-30T21:31:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=37868fe113ff2ba814b3b4eb12df214df555f8dc'/>
<id>37868fe113ff2ba814b3b4eb12df214df555f8dc</id>
<content type='text'>
modify_ldt() has questionable locking and does not synchronize
threads.  Improve it: redesign the locking and synchronize all
threads' LDTs using an IPI on all modifications.

This will dramatically slow down modify_ldt in multithreaded
programs, but there shouldn't be any multithreaded programs that
care about modify_ldt's performance in the first place.

This fixes some fallout from the CVE-2015-5157 fixes.

Signed-off-by: Andy Lutomirski &lt;luto@kernel.org&gt;
Reviewed-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Andrew Cooper &lt;andrew.cooper3@citrix.com&gt;
Cc: Andy Lutomirski &lt;luto@amacapital.net&gt;
Cc: Boris Ostrovsky &lt;boris.ostrovsky@oracle.com&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Brian Gerst &lt;brgerst@gmail.com&gt;
Cc: Denys Vlasenko &lt;dvlasenk@redhat.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Jan Beulich &lt;jbeulich@suse.com&gt;
Cc: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Sasha Levin &lt;sasha.levin@oracle.com&gt;
Cc: Steven Rostedt &lt;rostedt@goodmis.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: security@kernel.org &lt;security@kernel.org&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Cc: xen-devel &lt;xen-devel@lists.xen.org&gt;
Link: http://lkml.kernel.org/r/4c6978476782160600471bd865b318db34c7b628.1438291540.git.luto@kernel.org
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
modify_ldt() has questionable locking and does not synchronize
threads.  Improve it: redesign the locking and synchronize all
threads' LDTs using an IPI on all modifications.

This will dramatically slow down modify_ldt in multithreaded
programs, but there shouldn't be any multithreaded programs that
care about modify_ldt's performance in the first place.

This fixes some fallout from the CVE-2015-5157 fixes.

Signed-off-by: Andy Lutomirski &lt;luto@kernel.org&gt;
Reviewed-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Andrew Cooper &lt;andrew.cooper3@citrix.com&gt;
Cc: Andy Lutomirski &lt;luto@amacapital.net&gt;
Cc: Boris Ostrovsky &lt;boris.ostrovsky@oracle.com&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Brian Gerst &lt;brgerst@gmail.com&gt;
Cc: Denys Vlasenko &lt;dvlasenk@redhat.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Jan Beulich &lt;jbeulich@suse.com&gt;
Cc: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Sasha Levin &lt;sasha.levin@oracle.com&gt;
Cc: Steven Rostedt &lt;rostedt@goodmis.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: security@kernel.org &lt;security@kernel.org&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Cc: xen-devel &lt;xen-devel@lists.xen.org&gt;
Link: http://lkml.kernel.org/r/4c6978476782160600471bd865b318db34c7b628.1438291540.git.luto@kernel.org
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/x86/intel/cqm: Return cached counter value from IRQ context</title>
<updated>2015-07-26T08:22:29+00:00</updated>
<author>
<name>Matt Fleming</name>
<email>matt.fleming@intel.com</email>
</author>
<published>2015-07-21T14:55:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2c534c0da0a68418693e10ce1c4146e085f39518'/>
<id>2c534c0da0a68418693e10ce1c4146e085f39518</id>
<content type='text'>
Peter reported the following potential crash which I was able to
reproduce with his test program,

[  148.765788] ------------[ cut here ]------------
[  148.765796] WARNING: CPU: 34 PID: 2840 at kernel/smp.c:417 smp_call_function_many+0xb6/0x260()
[  148.765797] Modules linked in:
[  148.765800] CPU: 34 PID: 2840 Comm: perf Not tainted 4.2.0-rc1+ #4
[  148.765803]  ffffffff81cdc398 ffff88085f105950 ffffffff818bdfd5 0000000000000007
[  148.765805]  0000000000000000 ffff88085f105990 ffffffff810e413a 0000000000000000
[  148.765807]  ffffffff82301080 0000000000000022 ffffffff8107f640 ffffffff8107f640
[  148.765809] Call Trace:
[  148.765810]  &lt;NMI&gt;  [&lt;ffffffff818bdfd5&gt;] dump_stack+0x45/0x57
[  148.765818]  [&lt;ffffffff810e413a&gt;] warn_slowpath_common+0x8a/0xc0
[  148.765822]  [&lt;ffffffff8107f640&gt;] ? intel_cqm_stable+0x60/0x60
[  148.765824]  [&lt;ffffffff8107f640&gt;] ? intel_cqm_stable+0x60/0x60
[  148.765825]  [&lt;ffffffff810e422a&gt;] warn_slowpath_null+0x1a/0x20
[  148.765827]  [&lt;ffffffff811613f6&gt;] smp_call_function_many+0xb6/0x260
[  148.765829]  [&lt;ffffffff8107f640&gt;] ? intel_cqm_stable+0x60/0x60
[  148.765831]  [&lt;ffffffff81161748&gt;] on_each_cpu_mask+0x28/0x60
[  148.765832]  [&lt;ffffffff8107f6ef&gt;] intel_cqm_event_count+0x7f/0xe0
[  148.765836]  [&lt;ffffffff811cdd35&gt;] perf_output_read+0x2a5/0x400
[  148.765839]  [&lt;ffffffff811d2e5a&gt;] perf_output_sample+0x31a/0x590
[  148.765840]  [&lt;ffffffff811d333d&gt;] ? perf_prepare_sample+0x26d/0x380
[  148.765841]  [&lt;ffffffff811d3497&gt;] perf_event_output+0x47/0x60
[  148.765843]  [&lt;ffffffff811d36c5&gt;] __perf_event_overflow+0x215/0x240
[  148.765844]  [&lt;ffffffff811d4124&gt;] perf_event_overflow+0x14/0x20
[  148.765847]  [&lt;ffffffff8107e7f4&gt;] intel_pmu_handle_irq+0x1d4/0x440
[  148.765849]  [&lt;ffffffff811d07a6&gt;] ? __perf_event_task_sched_in+0x36/0xa0
[  148.765853]  [&lt;ffffffff81219bad&gt;] ? vunmap_page_range+0x19d/0x2f0
[  148.765854]  [&lt;ffffffff81219d11&gt;] ? unmap_kernel_range_noflush+0x11/0x20
[  148.765859]  [&lt;ffffffff814ce6fe&gt;] ? ghes_copy_tofrom_phys+0x11e/0x2a0
[  148.765863]  [&lt;ffffffff8109e5db&gt;] ? native_apic_msr_write+0x2b/0x30
[  148.765865]  [&lt;ffffffff8109e44d&gt;] ? x2apic_send_IPI_self+0x1d/0x20
[  148.765869]  [&lt;ffffffff81065135&gt;] ? arch_irq_work_raise+0x35/0x40
[  148.765872]  [&lt;ffffffff811c8d86&gt;] ? irq_work_queue+0x66/0x80
[  148.765875]  [&lt;ffffffff81075306&gt;] perf_event_nmi_handler+0x26/0x40
[  148.765877]  [&lt;ffffffff81063ed9&gt;] nmi_handle+0x79/0x100
[  148.765879]  [&lt;ffffffff81064422&gt;] default_do_nmi+0x42/0x100
[  148.765880]  [&lt;ffffffff81064563&gt;] do_nmi+0x83/0xb0
[  148.765884]  [&lt;ffffffff818c7c0f&gt;] end_repeat_nmi+0x1e/0x2e
[  148.765886]  [&lt;ffffffff811d07a6&gt;] ? __perf_event_task_sched_in+0x36/0xa0
[  148.765888]  [&lt;ffffffff811d07a6&gt;] ? __perf_event_task_sched_in+0x36/0xa0
[  148.765890]  [&lt;ffffffff811d07a6&gt;] ? __perf_event_task_sched_in+0x36/0xa0
[  148.765891]  &lt;&lt;EOE&gt;&gt;  [&lt;ffffffff8110ab66&gt;] finish_task_switch+0x156/0x210
[  148.765898]  [&lt;ffffffff818c1671&gt;] __schedule+0x341/0x920
[  148.765899]  [&lt;ffffffff818c1c87&gt;] schedule+0x37/0x80
[  148.765903]  [&lt;ffffffff810ae1af&gt;] ? do_page_fault+0x2f/0x80
[  148.765905]  [&lt;ffffffff818c1f4a&gt;] schedule_user+0x1a/0x50
[  148.765907]  [&lt;ffffffff818c666c&gt;] retint_careful+0x14/0x32
[  148.765908] ---[ end trace e33ff2be78e14901 ]---

The CQM task events are not safe to be called from within interrupt
context because they require performing an IPI to read the counter value
on all sockets. And performing IPIs from within IRQ context is a
"no-no".

Make do with the last read counter value currently event in
event-&gt;count when we're invoked in this context.

Reported-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Signed-off-by: Matt Fleming &lt;matt.fleming@intel.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Vikas Shivappa &lt;vikas.shivappa@intel.com&gt;
Cc: Kanaka Juvva &lt;kanaka.d.juvva@intel.com&gt;
Cc: Will Auld &lt;will.auld@intel.com&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Link: http://lkml.kernel.org/r/1437490509-15373-1-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Peter reported the following potential crash which I was able to
reproduce with his test program,

[  148.765788] ------------[ cut here ]------------
[  148.765796] WARNING: CPU: 34 PID: 2840 at kernel/smp.c:417 smp_call_function_many+0xb6/0x260()
[  148.765797] Modules linked in:
[  148.765800] CPU: 34 PID: 2840 Comm: perf Not tainted 4.2.0-rc1+ #4
[  148.765803]  ffffffff81cdc398 ffff88085f105950 ffffffff818bdfd5 0000000000000007
[  148.765805]  0000000000000000 ffff88085f105990 ffffffff810e413a 0000000000000000
[  148.765807]  ffffffff82301080 0000000000000022 ffffffff8107f640 ffffffff8107f640
[  148.765809] Call Trace:
[  148.765810]  &lt;NMI&gt;  [&lt;ffffffff818bdfd5&gt;] dump_stack+0x45/0x57
[  148.765818]  [&lt;ffffffff810e413a&gt;] warn_slowpath_common+0x8a/0xc0
[  148.765822]  [&lt;ffffffff8107f640&gt;] ? intel_cqm_stable+0x60/0x60
[  148.765824]  [&lt;ffffffff8107f640&gt;] ? intel_cqm_stable+0x60/0x60
[  148.765825]  [&lt;ffffffff810e422a&gt;] warn_slowpath_null+0x1a/0x20
[  148.765827]  [&lt;ffffffff811613f6&gt;] smp_call_function_many+0xb6/0x260
[  148.765829]  [&lt;ffffffff8107f640&gt;] ? intel_cqm_stable+0x60/0x60
[  148.765831]  [&lt;ffffffff81161748&gt;] on_each_cpu_mask+0x28/0x60
[  148.765832]  [&lt;ffffffff8107f6ef&gt;] intel_cqm_event_count+0x7f/0xe0
[  148.765836]  [&lt;ffffffff811cdd35&gt;] perf_output_read+0x2a5/0x400
[  148.765839]  [&lt;ffffffff811d2e5a&gt;] perf_output_sample+0x31a/0x590
[  148.765840]  [&lt;ffffffff811d333d&gt;] ? perf_prepare_sample+0x26d/0x380
[  148.765841]  [&lt;ffffffff811d3497&gt;] perf_event_output+0x47/0x60
[  148.765843]  [&lt;ffffffff811d36c5&gt;] __perf_event_overflow+0x215/0x240
[  148.765844]  [&lt;ffffffff811d4124&gt;] perf_event_overflow+0x14/0x20
[  148.765847]  [&lt;ffffffff8107e7f4&gt;] intel_pmu_handle_irq+0x1d4/0x440
[  148.765849]  [&lt;ffffffff811d07a6&gt;] ? __perf_event_task_sched_in+0x36/0xa0
[  148.765853]  [&lt;ffffffff81219bad&gt;] ? vunmap_page_range+0x19d/0x2f0
[  148.765854]  [&lt;ffffffff81219d11&gt;] ? unmap_kernel_range_noflush+0x11/0x20
[  148.765859]  [&lt;ffffffff814ce6fe&gt;] ? ghes_copy_tofrom_phys+0x11e/0x2a0
[  148.765863]  [&lt;ffffffff8109e5db&gt;] ? native_apic_msr_write+0x2b/0x30
[  148.765865]  [&lt;ffffffff8109e44d&gt;] ? x2apic_send_IPI_self+0x1d/0x20
[  148.765869]  [&lt;ffffffff81065135&gt;] ? arch_irq_work_raise+0x35/0x40
[  148.765872]  [&lt;ffffffff811c8d86&gt;] ? irq_work_queue+0x66/0x80
[  148.765875]  [&lt;ffffffff81075306&gt;] perf_event_nmi_handler+0x26/0x40
[  148.765877]  [&lt;ffffffff81063ed9&gt;] nmi_handle+0x79/0x100
[  148.765879]  [&lt;ffffffff81064422&gt;] default_do_nmi+0x42/0x100
[  148.765880]  [&lt;ffffffff81064563&gt;] do_nmi+0x83/0xb0
[  148.765884]  [&lt;ffffffff818c7c0f&gt;] end_repeat_nmi+0x1e/0x2e
[  148.765886]  [&lt;ffffffff811d07a6&gt;] ? __perf_event_task_sched_in+0x36/0xa0
[  148.765888]  [&lt;ffffffff811d07a6&gt;] ? __perf_event_task_sched_in+0x36/0xa0
[  148.765890]  [&lt;ffffffff811d07a6&gt;] ? __perf_event_task_sched_in+0x36/0xa0
[  148.765891]  &lt;&lt;EOE&gt;&gt;  [&lt;ffffffff8110ab66&gt;] finish_task_switch+0x156/0x210
[  148.765898]  [&lt;ffffffff818c1671&gt;] __schedule+0x341/0x920
[  148.765899]  [&lt;ffffffff818c1c87&gt;] schedule+0x37/0x80
[  148.765903]  [&lt;ffffffff810ae1af&gt;] ? do_page_fault+0x2f/0x80
[  148.765905]  [&lt;ffffffff818c1f4a&gt;] schedule_user+0x1a/0x50
[  148.765907]  [&lt;ffffffff818c666c&gt;] retint_careful+0x14/0x32
[  148.765908] ---[ end trace e33ff2be78e14901 ]---

The CQM task events are not safe to be called from within interrupt
context because they require performing an IPI to read the counter value
on all sockets. And performing IPIs from within IRQ context is a
"no-no".

Make do with the last read counter value currently event in
event-&gt;count when we're invoked in this context.

Reported-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Signed-off-by: Matt Fleming &lt;matt.fleming@intel.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Vikas Shivappa &lt;vikas.shivappa@intel.com&gt;
Cc: Kanaka Juvva &lt;kanaka.d.juvva@intel.com&gt;
Cc: Will Auld &lt;will.auld@intel.com&gt;
Cc: &lt;stable@vger.kernel.org&gt;
Link: http://lkml.kernel.org/r/1437490509-15373-1-git-send-email-matt@codeblueprint.co.uk
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2015-07-04T15:58:50+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-07-04T15:58:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=b1be9ead135939136b87d73004891a6bac35bb43'/>
<id>b1be9ead135939136b87d73004891a6bac35bb43</id>
<content type='text'>
Pull x86 fixes from Ingo Molnar:
 "Two FPU rewrite related fixes.  This addresses all known x86
  regressions at this stage.  Also some other misc fixes"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/fpu: Fix boot crash in the early FPU code
  x86/asm/entry/64: Update path names
  x86/fpu: Fix FPU related boot regression when CPUID masking BIOS feature is enabled
  x86/boot/setup: Clean up the e820_reserve_setup_data() code
  x86/kaslr: Fix typo in the KASLR_FLAG documentation
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull x86 fixes from Ingo Molnar:
 "Two FPU rewrite related fixes.  This addresses all known x86
  regressions at this stage.  Also some other misc fixes"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/fpu: Fix boot crash in the early FPU code
  x86/asm/entry/64: Update path names
  x86/fpu: Fix FPU related boot regression when CPUID masking BIOS feature is enabled
  x86/boot/setup: Clean up the e820_reserve_setup_data() code
  x86/kaslr: Fix typo in the KASLR_FLAG documentation
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2015-07-04T15:17:29+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-07-04T15:17:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c1776a18e3b5a3559f3dff5df0ecce570abd3a9f'/>
<id>c1776a18e3b5a3559f3dff5df0ecce570abd3a9f</id>
<content type='text'>
Pull perf updates from Ingo Molnar:
 "This tree includes an x86 PMU scheduling fix, but most changes are
  late breaking tooling fixes and updates:

  User visible fixes:

   - Create config.detected into OUTPUT directory, fixing parallel
     builds sharing the same source directory (Aaro Kiskinen)

   - Allow to specify custom linker command, fixing some MIPS64 builds.
     (Aaro Kiskinen)

   - Fix to show proper convergence stats in 'perf bench numa' (Srikar
     Dronamraju)

  User visible changes:

   - Validate syscall list passed via -e argument to 'perf trace'.
     (Arnaldo Carvalho de Melo)

   - Introduce 'perf stat --per-thread' (Jiri Olsa)

   - Check access permission for --kallsyms and --vmlinux (Li Zhang)

   - Move toggling event logic from 'perf top' and into hists browser,
     allowing freeze/unfreeze with event lists with more than one entry
     (Namhyung Kim)

   - Add missing newlines when dumping PERF_RECORD_FINISHED_ROUND and
     showing the Aggregated stats in 'perf report -D' (Adrian Hunter)

  Infrastructure fixes:

   - Add missing break for PERF_RECORD_ITRACE_START, which caused those
     events samples to be parsed as well as PERF_RECORD_LOST_SAMPLES.
     ITRACE_START only appears when Intel PT or BTS are present, so..
     (Jiri Olsa)

   - Call the perf_session destructor when bailing out in the inject,
     kmem, report, kvm and mem tools (Taeung Song)

  Infrastructure changes:

   - Move stuff out of 'perf stat' and into the lib for further use
     (Jiri Olsa)

   - Reference count the cpu_map and thread_map classes (Jiri Olsa)

   - Set evsel-&gt;{cpus,threads} from the evlist, if not set, allowing the
     generalization of some 'perf stat' functions that previously were
     accessing private static evlist variable (Jiri Olsa)

   - Delete an unnecessary check before the calling free_event_desc()
     (Markus Elfring)

   - Allow auxtrace data alignment (Adrian Hunter)

   - Allow events with dot (Andi Kleen)

   - Fix failure to 'perf probe' events on arm (He Kuang)

   - Add testing for Makefile.perf (Jiri Olsa)

   - Add test for make install with prefix (Jiri Olsa)

   - Fix single target build dependency check (Jiri Olsa)

   - Access thread_map entries via accessors, prep patch to hold more
     info per entry, for ongoing 'perf stat --per-thread' work (Jiri
     Olsa)

   - Use __weak definition from compiler.h (Sukadev Bhattiprolu)

   - Split perf_pmu__new_alias() (Sukadev Bhattiprolu)"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (54 commits)
  perf tools: Allow to specify custom linker command
  perf tools: Create config.detected into OUTPUT directory
  perf mem: Fill in the missing session freeing after an error occurs
  perf kvm: Fill in the missing session freeing after an error occurs
  perf report: Fill in the missing session freeing after an error occurs
  perf kmem: Fill in the missing session freeing after an error occurs
  perf inject: Fill in the missing session freeing after an error occurs
  perf tools: Add missing break for PERF_RECORD_ITRACE_START
  perf/x86: Fix 'active_events' imbalance
  perf symbols: Check access permission when reading symbol files
  perf stat: Introduce --per-thread option
  perf stat: Introduce print_counters function
  perf stat: Using init_stats instead of memset
  perf stat: Rename print_interval to process_interval
  perf stat: Remove perf_evsel__read_cb function
  perf stat: Move perf_stat initialization counter process code
  perf stat: Move zero_per_pkg into counter process code
  perf stat: Separate counters reading and processing
  perf stat: Introduce read_counters function
  perf stat: Introduce perf_evsel__read function
  ...
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull perf updates from Ingo Molnar:
 "This tree includes an x86 PMU scheduling fix, but most changes are
  late breaking tooling fixes and updates:

  User visible fixes:

   - Create config.detected into OUTPUT directory, fixing parallel
     builds sharing the same source directory (Aaro Kiskinen)

   - Allow to specify custom linker command, fixing some MIPS64 builds.
     (Aaro Kiskinen)

   - Fix to show proper convergence stats in 'perf bench numa' (Srikar
     Dronamraju)

  User visible changes:

   - Validate syscall list passed via -e argument to 'perf trace'.
     (Arnaldo Carvalho de Melo)

   - Introduce 'perf stat --per-thread' (Jiri Olsa)

   - Check access permission for --kallsyms and --vmlinux (Li Zhang)

   - Move toggling event logic from 'perf top' and into hists browser,
     allowing freeze/unfreeze with event lists with more than one entry
     (Namhyung Kim)

   - Add missing newlines when dumping PERF_RECORD_FINISHED_ROUND and
     showing the Aggregated stats in 'perf report -D' (Adrian Hunter)

  Infrastructure fixes:

   - Add missing break for PERF_RECORD_ITRACE_START, which caused those
     events samples to be parsed as well as PERF_RECORD_LOST_SAMPLES.
     ITRACE_START only appears when Intel PT or BTS are present, so..
     (Jiri Olsa)

   - Call the perf_session destructor when bailing out in the inject,
     kmem, report, kvm and mem tools (Taeung Song)

  Infrastructure changes:

   - Move stuff out of 'perf stat' and into the lib for further use
     (Jiri Olsa)

   - Reference count the cpu_map and thread_map classes (Jiri Olsa)

   - Set evsel-&gt;{cpus,threads} from the evlist, if not set, allowing the
     generalization of some 'perf stat' functions that previously were
     accessing private static evlist variable (Jiri Olsa)

   - Delete an unnecessary check before the calling free_event_desc()
     (Markus Elfring)

   - Allow auxtrace data alignment (Adrian Hunter)

   - Allow events with dot (Andi Kleen)

   - Fix failure to 'perf probe' events on arm (He Kuang)

   - Add testing for Makefile.perf (Jiri Olsa)

   - Add test for make install with prefix (Jiri Olsa)

   - Fix single target build dependency check (Jiri Olsa)

   - Access thread_map entries via accessors, prep patch to hold more
     info per entry, for ongoing 'perf stat --per-thread' work (Jiri
     Olsa)

   - Use __weak definition from compiler.h (Sukadev Bhattiprolu)

   - Split perf_pmu__new_alias() (Sukadev Bhattiprolu)"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (54 commits)
  perf tools: Allow to specify custom linker command
  perf tools: Create config.detected into OUTPUT directory
  perf mem: Fill in the missing session freeing after an error occurs
  perf kvm: Fill in the missing session freeing after an error occurs
  perf report: Fill in the missing session freeing after an error occurs
  perf kmem: Fill in the missing session freeing after an error occurs
  perf inject: Fill in the missing session freeing after an error occurs
  perf tools: Add missing break for PERF_RECORD_ITRACE_START
  perf/x86: Fix 'active_events' imbalance
  perf symbols: Check access permission when reading symbol files
  perf stat: Introduce --per-thread option
  perf stat: Introduce print_counters function
  perf stat: Using init_stats instead of memset
  perf stat: Rename print_interval to process_interval
  perf stat: Remove perf_evsel__read_cb function
  perf stat: Move perf_stat initialization counter process code
  perf stat: Move zero_per_pkg into counter process code
  perf stat: Separate counters reading and processing
  perf stat: Introduce read_counters function
  perf stat: Introduce perf_evsel__read function
  ...
</pre>
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</content>
</entry>
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