linux-toradex.git/arch/xtensa/boot/dts, branch v3.17 Linux kernel for Apalis and Colibri modules xtensa: configure kc705 for highmem 2014-08-14T07:59:25+00:00 Max Filippov jcmvbkbc@gmail.com 2014-03-24T01:16:02+00:00 b82837c772c3a1d8778295ab094cf46ecddc8057 Enable all memory available on KC705 (1G - 128M) by default. Update memory node in DTS and also limit usable memory in bootargs in case memmap is passed from the bootloader. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 
Enable all memory available on KC705 (1G - 128M) by default. Update memory
node in DTS and also limit usable memory in bootargs in case memmap is
passed from the bootloader.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
xtensa: add support for KC705 2014-04-06T17:32:02+00:00 Max Filippov jcmvbkbc@gmail.com 2013-04-28T15:15:56+00:00 9c602629e34bad88a464e08de08118e80beee0d8 Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
xtensa: xtfpga: introduce SoC I/O bus 2014-04-06T17:32:02+00:00 Max Filippov jcmvbkbc@gmail.com 2014-02-22T23:48:32+00:00 08a7bbf624072bed1cb35e5b4db7d538580f731c Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
xtensa: xtfpga: set ethoc clock frequency 2014-02-21T17:33:44+00:00 Max Filippov jcmvbkbc@gmail.com 2014-01-29T03:53:44+00:00 2bc2fde63858322a942864bf6cb2d54f5aa33186 Connect xtfpga board ethernet MAC to the clock in the DTS. Set up MAC base frequency in the platform data in case of build w/o CONFIG_OF. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 
Connect xtfpga board ethernet MAC to the clock in the DTS. Set up MAC
base frequency in the platform data in case of build w/o CONFIG_OF.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
xtensa: xtfpga: use common clock framework 2014-02-21T17:33:43+00:00 Max Filippov jcmvbkbc@gmail.com 2014-01-29T03:42:46+00:00 cdc9af7ccfc26d35ff8a29dded2cc2c096c0fc1e With this change the board needs to set up single clock object, users of this clock will get correct frequency automatically. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 
With this change the board needs to set up single clock object, users of
this clock will get correct frequency automatically.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
xtensa: standardize devicetree cpu compatible strings 2014-01-14T20:21:25+00:00 Baruch Siach baruch@tkos.co.il 2013-12-01T08:13:33+00:00 42beb7628e7a901501e39f520beec67bac3157b1 The recommended compatible string format, according to the ePAPR v1.1 standard, is "manufacturer,model". Change the xtensa cpu compatible strings to "cdns,xtensa-cpu". Also, change the boards compatible strings in a similar way. The pic compatible string will be dealt with in a separate patch. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> 
The recommended compatible string format, according to the ePAPR v1.1 standard,
is "manufacturer,model". Change the xtensa cpu compatible strings to
"cdns,xtensa-cpu". Also, change the boards compatible strings in a similar way.

The pic compatible string will be dealt with in a separate patch.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
xtensa: move built-in PIC to drivers/irqchip 2014-01-14T18:19:56+00:00 Max Filippov jcmvbkbc@gmail.com 2013-12-01T08:59:49+00:00 cbd1de2e8e46207cead11034f92ea8a018b11189 Extract xtensa built-in interrupt controller implementation from xtensa/kernel/irq.c and move it to other irqchips, providing way to instantiate it from the device tree. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net> 
Extract xtensa built-in interrupt controller implementation from
xtensa/kernel/irq.c and move it to other irqchips, providing way to
instantiate it from the device tree.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
xtensa: use new common dtc rule 2013-02-24T03:12:52+00:00 Stephen Warren swarren@nvidia.com 2013-01-02T18:27:14+00:00 2a02bc166dd1c7dae71bd3115fb10ec0c351a31f The current rules have the .dtb files build in a different directory from the .dts files. This patch changes xtensa to use the generic dtb rule which builds .dtb files in the same directory as the source .dts. This requires moving parts of arch/xtensa/boot/Makefile into newly created arch/xtensa/boot/dts/Makefile, and updating arch/xtensa/Makefile to call the new Makefile. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Chris Zankel <chris@zankel.net> 
The current rules have the .dtb files build in a different directory
from the .dts files. This patch changes xtensa to use the generic dtb
rule which builds .dtb files in the same directory as the source .dts.

This requires moving parts of arch/xtensa/boot/Makefile into newly
created arch/xtensa/boot/dts/Makefile, and updating arch/xtensa/Makefile
to call the new Makefile.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
xtensa: add XTFPGA DTS 2012-12-19T05:10:24+00:00 Max Filippov jcmvbkbc@gmail.com 2012-11-03T08:57:52+00:00 5584b4da7814af7d35a72d904140bf9c2a502d4e Add common XTFPGA parts as *.dtsi (base board, flash) and DTS for LX60 and for ML605. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net> 
Add common XTFPGA parts as *.dtsi (base board, flash) and DTS for LX60
and for ML605.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>