<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/arch/xtensa/kernel/entry.S, branch v3.3.5</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>Fix common misspellings</title>
<updated>2011-03-31T14:26:23+00:00</updated>
<author>
<name>Lucas De Marchi</name>
<email>lucas.demarchi@profusion.mobi</email>
</author>
<published>2011-03-31T01:57:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=25985edcedea6396277003854657b5f3cb31a628'/>
<id>25985edcedea6396277003854657b5f3cb31a628</id>
<content type='text'>
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@profusion.mobi&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@profusion.mobi&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: Shuffle include statements to fix linker script</title>
<updated>2010-05-02T08:05:13+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2010-05-02T08:05:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4573e398d591a2fe6c600908578fd31401746529'/>
<id>4573e398d591a2fe6c600908578fd31401746529</id>
<content type='text'>
The linker script was including assembly macros from the coprocessor
header file that is not otherwise used by the script.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The linker script was including assembly macros from the coprocessor
header file that is not otherwise used by the script.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tree-wide: Assorted spelling fixes</title>
<updated>2010-02-09T10:13:56+00:00</updated>
<author>
<name>Daniel Mack</name>
<email>daniel@caiaq.de</email>
</author>
<published>2010-02-03T00:01:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3ad2f3fbb961429d2aa627465ae4829758bc7e07'/>
<id>3ad2f3fbb961429d2aa627465ae4829758bc7e07</id>
<content type='text'>
In particular, several occurances of funny versions of 'success',
'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address',
'beginning', 'desirable', 'separate' and 'necessary' are fixed.

Signed-off-by: Daniel Mack &lt;daniel@caiaq.de&gt;
Cc: Joe Perches &lt;joe@perches.com&gt;
Cc: Junio C Hamano &lt;gitster@pobox.com&gt;
Signed-off-by: Jiri Kosina &lt;jkosina@suse.cz&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In particular, several occurances of funny versions of 'success',
'unknown', 'therefore', 'acknowledge', 'argument', 'achieve', 'address',
'beginning', 'desirable', 'separate' and 'necessary' are fixed.

Signed-off-by: Daniel Mack &lt;daniel@caiaq.de&gt;
Cc: Joe Perches &lt;joe@perches.com&gt;
Cc: Junio C Hamano &lt;gitster@pobox.com&gt;
Signed-off-by: Jiri Kosina &lt;jkosina@suse.cz&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: nommu support</title>
<updated>2009-04-03T06:41:50+00:00</updated>
<author>
<name>Johannes Weiner</name>
<email>jw@emlix.com</email>
</author>
<published>2009-03-04T15:21:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e5083a63b6a8546c5fe1e571fe529e3939787ec2'/>
<id>e5083a63b6a8546c5fe1e571fe529e3939787ec2</id>
<content type='text'>
Add support for !CONFIG_MMU setups.

Signed-off-by: Johannes Weiner &lt;jw@emlix.com&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for !CONFIG_MMU setups.

Signed-off-by: Johannes Weiner &lt;jw@emlix.com&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: move headers files to arch/xtensa/include</title>
<updated>2008-11-06T18:25:09+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2008-11-06T14:40:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=367b8112fe2ea5c39a7bb4d263dcdd9b612fae18'/>
<id>367b8112fe2ea5c39a7bb4d263dcdd9b612fae18</id>
<content type='text'>
Move all header files for xtensa to arch/xtensa/include and platform and
variant header files to the appropriate arch/xtensa/platforms/ and
arch/xtensa/variants/ directories.

Moving the files gets also rid of all uses of symlinks in the Makefile.

This has been completed already for the majority of the architectures
and xtensa is one out of six missing.

Signed-off-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move all header files for xtensa to arch/xtensa/include and platform and
variant header files to the appropriate arch/xtensa/platforms/ and
arch/xtensa/variants/ directories.

Moving the files gets also rid of all uses of symlinks in the Makefile.

This has been completed already for the majority of the architectures
and xtensa is one out of six missing.

Signed-off-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[XTENSA] Fix register corruption for certain processor configurations</title>
<updated>2008-02-14T01:43:54+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2008-01-22T08:45:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e1088430626b2ec4cd64f2fb7d9fd7c6df5d5824'/>
<id>e1088430626b2ec4cd64f2fb7d9fd7c6df5d5824</id>
<content type='text'>
For processor configurations that have optional registers
(compiler-used but non-coprocessor), user space registers
might get corrupted when there are only 4 registers in
the current window-frame, ie. register a4 belongs to the
oldest frame in the register file.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For processor configurations that have optional registers
(compiler-used but non-coprocessor), user space registers
might get corrupted when there are only 4 registers in
the current window-frame, ie. register a4 belongs to the
oldest frame in the register file.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[XTENSA] Add support for configurable registers and coprocessors</title>
<updated>2008-02-14T01:41:43+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2008-02-12T21:17:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=c658eac628aa8df040dfe614556d95e6da3a9ffb'/>
<id>c658eac628aa8df040dfe614556d95e6da3a9ffb</id>
<content type='text'>
The Xtensa architecture allows to define custom instructions and
registers. Registers that are bound to a coprocessor are only
accessible if the corresponding enable bit is set, which allows
to implement a 'lazy' context switch mechanism. Other registers
needs to be saved and restore at the time of the context switch
or during interrupt handling.

This patch adds support for these additional states:

- save and restore registers that are used by the compiler upon
  interrupt entry and exit.
- context switch additional registers unbound to any coprocessor
- 'lazy' context switch of registers bound to a coprocessor
- ptrace interface to provide access to additional registers
- update configuration files in include/asm-xtensa/variant-fsf

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Xtensa architecture allows to define custom instructions and
registers. Registers that are bound to a coprocessor are only
accessible if the corresponding enable bit is set, which allows
to implement a 'lazy' context switch mechanism. Other registers
needs to be saved and restore at the time of the context switch
or during interrupt handling.

This patch adds support for these additional states:

- save and restore registers that are used by the compiler upon
  interrupt entry and exit.
- context switch additional registers unbound to any coprocessor
- 'lazy' context switch of registers bound to a coprocessor
- ptrace interface to provide access to additional registers
- update configuration files in include/asm-xtensa/variant-fsf

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[XTENSA] Remove unused code</title>
<updated>2008-02-14T01:24:17+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2008-02-12T21:10:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=03dfa442e5aaf644bb9b3b506abbd76786867eb1'/>
<id>03dfa442e5aaf644bb9b3b506abbd76786867eb1</id>
<content type='text'>
We will never (need to) support signal handling coming from a
double exception. There are too many things that could go wrong
and delivering signals is not the fastest method for IPC, anyway.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We will never (need to) support signal handling coming from a
double exception. There are too many things that could go wrong
and delivering signals is not the fastest method for IPC, anyway.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[XTENSA] Fix comments regarding the number of frames to save</title>
<updated>2008-02-14T01:22:18+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2008-01-09T17:22:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=ea0b6b066304d9f7e24b273c71fab5d67ce54f96'/>
<id>ea0b6b066304d9f7e24b273c71fab5d67ce54f96</id>
<content type='text'>
Signed-off-by: Marc Gauthier &lt;marc@tensilica.com&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Marc Gauthier &lt;marc@tensilica.com&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[XTENSA] Add missing a2 register restore in register spill routine</title>
<updated>2008-02-14T01:21:27+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2007-11-14T21:47:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=50c0716aa2f49a9d34589e380fad73402464c088'/>
<id>50c0716aa2f49a9d34589e380fad73402464c088</id>
<content type='text'>
Register a2 is saved in depc but wasn't getting restored before
returning from _spill_registers when there weren't any registers
to spill. The mask to cut the top bit from the rotated WINDOWMASK
register was also one bit short.

Signed-off-by: CHris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Register a2 is saved in depc but wasn't getting restored before
returning from _spill_registers when there weren't any registers
to spill. The mask to cut the top bit from the rotated WINDOWMASK
register was also one bit short.

Signed-off-by: CHris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
</feed>
