linux-toradex.git/arch/xtensa/kernel/traps.c, branch v6.16-rc2

xtensa: Rely on generic printing of preemption model

2025-03-17T10:23:40+00:00

die() invokes later show_regs() -> show_regs_print_info() which prints
the current preemption model.

Remove it from the initial line.

Signed-off-by: Sebastian Andrzej Siewior 
Signed-off-by: Peter Zijlstra (Intel) 
Acked-by: Max Filippov 
Link: https://lore.kernel.org/r/20250314160810.2373416-9-bigeasy@linutronix.de

xtensa: traps: add for function prototype

2023-09-20T12:03:20+00:00

Use  to provide the prototype for trap_init(), to prevent
a build warning:

arch/xtensa/kernel/traps.c:484:13: warning: no previous prototype for 'trap_init' [-Wmissing-prototypes]
  484 | void __init trap_init(void)

Signed-off-by: Randy Dunlap 
Cc: Chris Zankel 
Cc: Max Filippov 
Message-Id: <20230920052139.10570-9-rdunlap@infradead.org>
Signed-off-by: Max Filippov

xtensa: fix unaligned and load/store configuration interaction

2023-07-11T04:41:04+00:00

Unaligned exception handler is needed in configurations with hardware
support for unaligned access when the load/store exception handler is
enabled because such configurations would still raise an exception on
unaligned access through the instruction bus.

Fixes: f29cf77609cc ("xtensa: add load/store exception handler")
Signed-off-by: Max Filippov

xtensa: dump userspace code around the exception PC

2023-06-24T13:34:27+00:00

In the absence of other debug facilities dumping user code around the
unhandled exception address may help debugging the issue.

Signed-off-by: Max Filippov

xtensa: rearrange show_stack output

2023-06-14T04:56:27+00:00

Minimal stack alignment on xtensa is 16 bytes, having stack dump in
32-byte lines may be visually misleading as the stack frame border may
be in the middle of the line.
Arrange stack dump in 16-byte lines. Mark lines at stack frame borders
with arrows.

Signed-off-by: Max Filippov

xtensa: add load/store exception handler

2023-06-14T04:56:27+00:00

Memory attached to instruction bus of the xtensa CPU is only accessible
for a limited subset of opcodes. Other opcodes generate an exception
with the load/store error cause code. This property complicates use of
such systems. Provide a handler that recognizes and transparently fixes
such exceptions. The following opcodes are recognized when used outside
of FLIX bundles: l32i, l32i.n, l16ui, l16si, l8ui.

Signed-off-by: Max Filippov

xtensa: always install slow handler for unaligned access exception

2023-06-14T04:56:27+00:00

Currently slow handler for unaligned access exception is not installed
when CPU has hardware support for unaligned access. However some opcodes
(e.g. l32ai, s32ri, s32c1i) would still raise unaligned access exception
even on such CPUs. In that case instead of SIGBUS and a diagnostic entry
in the kernel log the faulting process would receive SIGILL.
Always install slow handler for unaligned access exception to fix that.

Signed-off-by: Max Filippov

xtensa: fix KASAN report for show_stack

2023-03-17T23:44:28+00:00

show_stack dumps raw stack contents which may trigger an unnecessary
KASAN report. Fix it by copying stack contents to a temporary buffer
with __memcpy and then printing that buffer instead of passing stack
pointer directly to the print_hex_dump.

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov

xtensa: drop unused members of struct thread_struct

2023-01-07T07:33:11+00:00

bad_vaddr, bad_uaddr and error_code fields are set but never read by the
xtensa arch-specific code. Drop them. Also drop the commented out info
field.

Signed-off-by: Max Filippov

xtensa: Return true/false (not 1/0) from bool function

2022-05-23T07:33:05+00:00

Return boolean values ("true" or "false") instead of 1 or 0 from bool
function. This fixes the following warnings from coccicheck:

./arch/xtensa/kernel/traps.c:304:10-11: WARNING: return of 0/1 in
function 'check_div0' with return type bool

Reported-by: Abaci Robot 
Signed-off-by: Yang Li 
Message-Id: <20220518230953.112266-1-yang.lee@linux.alibaba.com>
Signed-off-by: Max Filippov