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<title>linux-toradex.git/arch/xtensa/mm/Makefile, branch v3.4.78</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>xtensa: nommu support</title>
<updated>2009-04-03T06:41:50+00:00</updated>
<author>
<name>Johannes Weiner</name>
<email>jw@emlix.com</email>
</author>
<published>2009-03-04T15:21:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e5083a63b6a8546c5fe1e571fe529e3939787ec2'/>
<id>e5083a63b6a8546c5fe1e571fe529e3939787ec2</id>
<content type='text'>
Add support for !CONFIG_MMU setups.

Signed-off-by: Johannes Weiner &lt;jw@emlix.com&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
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<pre>
Add support for !CONFIG_MMU setups.

Signed-off-by: Johannes Weiner &lt;jw@emlix.com&gt;
Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Remove references to "make dep"</title>
<updated>2008-01-28T22:22:13+00:00</updated>
<author>
<name>Adrian Bunk</name>
<email>bunk@kernel.org</email>
</author>
<published>2007-11-11T06:48:25+00:00</published>
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<id>d3883ecebbf9e095b9e379dabbbe8b2c1ee7a41c</id>
<content type='text'>
"make dep" is no longer required in kernel 2.6, but was still mentioned
in some places.

Signed-off-by: Adrian Bunk &lt;bunk@kernel.org&gt;
Signed-off-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
</content>
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<pre>
"make dep" is no longer required in kernel 2.6, but was still mentioned
in some places.

Signed-off-by: Adrian Bunk &lt;bunk@kernel.org&gt;
Signed-off-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[XTENSA] Add support for cache-aliasing</title>
<updated>2007-08-27T20:54:16+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2007-08-22T17:14:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6656920b0b50beacb6cb64cf55273cbb686e436e'/>
<id>6656920b0b50beacb6cb64cf55273cbb686e436e</id>
<content type='text'>
Add support for processors that have cache-aliasing issues, such as
the Stretch S5000 processor. Cache-aliasing means that the size of
the cache (for one way) is larger than the page size, thus, a page
can end up in several places in cache depending on the virtual to
physical translation. The method used here is to map a user page
temporarily through the auto-refill way 0 and of of the DTLB.
We probably will want to revisit this issue and use a better
approach with kmap/kunmap.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
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<pre>
Add support for processors that have cache-aliasing issues, such as
the Stretch S5000 processor. Cache-aliasing means that the size of
the cache (for one way) is larger than the page size, thus, a page
can end up in several places in cache depending on the virtual to
physical translation. The method used here is to map a user page
temporarily through the auto-refill way 0 and of of the DTLB.
We probably will want to revisit this issue and use a better
approach with kmap/kunmap.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 5</title>
<updated>2005-06-24T07:05:22+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>czankel@tensilica.com</email>
</author>
<published>2005-06-24T05:01:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=3f65ce4d141e435e54c20ed2379d983d362a2cb5'/>
<id>3f65ce4d141e435e54c20ed2379d983d362a2cb5</id>
<content type='text'>
The attached patches provides part 5 of an architecture implementation for the
Tensilica Xtensa CPU series.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
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<pre>
The attached patches provides part 5 of an architecture implementation for the
Tensilica Xtensa CPU series.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
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