linux-toradex.git/arch, branch tegra-10.11.6 Linux kernel for Apalis and Colibri modules arm: ventana: i2c addresses for new i2c slaves 2011-04-05T00:59:11+00:00 Nitin Kumbhar nkumbhar@nvidia.com 2011-04-01T14:16:09+00:00 bfc02b9759f1610d9f30bdef4f1a4ada75f38a37 Assign 0xFC as i2c slave address for all new i2c slaves BUG 788286 Reviewed-on: http://git-master/r/25101 (cherry picked from commit 32390e01c72732272c933883d0921a80d369c82f) Change-Id: Id1d19c7b03ff5ce6b4150f2a84ce2885e8edb44c Reviewed-on: http://git-master/r/25224 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> 
Assign 0xFC as i2c slave address for all new i2c slaves

BUG 788286

Reviewed-on: http://git-master/r/25101
(cherry picked from commit 32390e01c72732272c933883d0921a80d369c82f)

Change-Id: Id1d19c7b03ff5ce6b4150f2a84ce2885e8edb44c
Reviewed-on: http://git-master/r/25224
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: tegra: clocks: Add mux clock inputs to cdev1 and cdev2 2011-04-05T00:57:51+00:00 Jin Park jinyoungp@nvidia.com 2011-03-16T13:59:31+00:00 8b81c1c918c289328df61b1e325a8019f9814d98 For getting actual rate, add mux clock inputs to cdev1 and cdev2. Change-Id: Ic42eb97a51bceb5249ca29938ac00f8add9ef032 Signed-off-by: Jin Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/23187 Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
For getting actual rate, add mux clock inputs to cdev1 and cdev2.

Change-Id: Ic42eb97a51bceb5249ca29938ac00f8add9ef032
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/23187
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
tegra: otg: detect usb hotplug 2011-04-02T02:29:40+00:00 Prashant Gaikwad pgaikwad@nvidia.com 2011-03-29T13:40:04+00:00 8014ff69b2b8a860840f04d26ad164ae8353b04d Detect vbus and enable clock for usb otg using the interrupt received in usb phy. usb phy interrupt is configured to max8907c usb detect interrupt to get event for usb insertion when otg is suspended. Bug 806949 Change-Id: I73fb92534ce5ae8d1ea39dfe756f940b89af7d79 Reviewed-on: http://git-master/r/24684 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
Detect vbus and enable clock for usb otg using the interrupt received in
usb phy. usb phy interrupt is configured to max8907c usb detect interrupt to
get event for usb insertion when otg is suspended.

Bug 806949

Change-Id: I73fb92534ce5ae8d1ea39dfe756f940b89af7d79
Reviewed-on: http://git-master/r/24684
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: tegra: spi: spi slave device related additions 2011-04-02T02:29:27+00:00 Sheshagiri Shenoy sshenoy@nvidia.com 2011-03-18T18:04:01+00:00 b1b863de1b1a83f8f9edd8e8e6172d3aa55f3f60 - spi slave device added. - clock entry added for spi slave device. bug 785523 Change-Id: I6d3daeb3e7f4171f2dc4f9ec1fe255f19ea48928 Reviewed-on: http://git-master/r/23554 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
- spi slave device added.
- clock entry added for spi slave device.

bug 785523

Change-Id: I6d3daeb3e7f4171f2dc4f9ec1fe255f19ea48928
Reviewed-on: http://git-master/r/23554
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: tegra: spi: slave spi driver bug fixes 2011-04-02T02:29:16+00:00 Sheshagiri Shenoy sshenoy@nvidia.com 2011-03-17T23:47:11+00:00 9d0892e0a0a1570e866ef7aaf1c19fb8356e5ff2 - the way spi slave driver waits for fifo to be full is fixed. - rx and tx fifo fill/drain logic fixed. - added makefile entry and kconfig entry to enable conditional compiling. bug 785523 Change-Id: Ib01381704aa2bd519a1146a9cd8efe75646efd6f Reviewed-on: http://git-master/r/23416 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> 
- the way spi slave driver waits for fifo to be full is fixed.
- rx and tx fifo fill/drain logic fixed.
- added makefile entry and kconfig entry to enable conditional
compiling.

bug 785523

Change-Id: Ib01381704aa2bd519a1146a9cd8efe75646efd6f
Reviewed-on: http://git-master/r/23416
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: tegra: fuse: calculate pgm cycles from oscillator freq 2011-04-02T02:25:50+00:00 Varun Wadekar vwadekar@nvidia.com 2011-03-31T10:34:16+00:00 82727cdc199df35484927ba44813e431cc4a7944 calculate the number of programming cycles to be used to burn fuses from the oscillator frequency that is being used. Bug 796825 Change-Id: I1698017f1c9661560d36a9ad613f6a4b1c51df46 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/24922 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
calculate the number of programming cycles to be used to burn
fuses from the oscillator frequency that is being used.

Bug 796825

Change-Id: I1698017f1c9661560d36a9ad613f6a4b1c51df46
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/24922
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: tegra: fuse: expose fuses through sysfs 2011-04-02T02:25:44+00:00 Varun Wadekar vwadekar@nvidia.com 2011-03-13T12:10:30+00:00 4c92e4f2ac11913c4ba19d3ffc1be0f5ae8c4ca6 fuses can be read/written via sysfs entries. fuse sysfs entries will be present under /sys/firmware/fuse Based on work done by Venu Byravarasu <vbyravarasu@nvidia.com> Change-Id: Iadb0a83671c8823c541f6bcc2f5f5583d750c1ed Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/22763 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
fuses can be read/written via sysfs entries.
fuse sysfs entries will be present under /sys/firmware/fuse

Based on work done by Venu Byravarasu <vbyravarasu@nvidia.com>

Change-Id: Iadb0a83671c8823c541f6bcc2f5f5583d750c1ed
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/22763
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: tegra: usb_phy: Setting USB_TXFILLTUNING for underrun issue 2011-04-02T02:25:37+00:00 Seshendra Gadagottu sgadagottu@nvidia.com 2011-03-13T06:43:28+00:00 e09e4554f46532b1bea0f13d444e81efbb361fff Setting the USB_TXFILLTUNING to 0x10, where as power on value is 0x2. With this updated setting USB2 controller under run are avoided. Setting this value after power_on and post_resume. Bug 791857 Change-Id: I10ed644ee90d4bc119562699c624568b3a868942 Reviewed-on: http://git-master/r/22735 Reviewed-on: http://git-master/r/23183 Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> 
Setting the USB_TXFILLTUNING to 0x10, where as power on value
is 0x2. With this updated setting USB2 controller under run
are avoided. Setting this value after power_on and post_resume.
Bug 791857

Change-Id: I10ed644ee90d4bc119562699c624568b3a868942
Reviewed-on: http://git-master/r/22735
Reviewed-on: http://git-master/r/23183
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
arm: tegra: clock: Fixing valid range of 16bit divisor 2011-04-02T02:25:28+00:00 Laxman Dewangan ldewangan@nvidia.com 2011-03-31T16:08:45+00:00 3232571484990077caf807d389a5ca002e14920f Fixing the possible upper range for the 16bit clock source divisor. Change-Id: Iae5f06b6ce2cbb9c1693963da1b033cfd330c788 Reviewed-on: http://git-master/r/24947 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> 
Fixing the possible upper range for the 16bit clock source
divisor.

Change-Id: Iae5f06b6ce2cbb9c1693963da1b033cfd330c788
Reviewed-on: http://git-master/r/24947
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
ARM: tegra: smp: fix build failure with CONFIG_SMP=n 2011-04-02T02:25:22+00:00 Donghan Ryu dryu@nvidia.com 2011-03-29T16:10:14+00:00 9ad116ef0413ec32eb75af546c3cdcb7fc15d7a8 Devs can disable SMP for debugging. However, there was a build failure when CONFIG_SMP=n. This change fixes it with minimum change. It looks like headsmp.s and headsmp-t2.s cannot be removed from Makefile since there are stuff used for both multicore/unicore cpus in it. Bug 809076 Change-Id: Idc440aa912a98f5decff4c59845af4918e504cd2 Reviewed-on: http://git-master/r/24843 Reviewed-by: Donghan Ryu <dryu@nvidia.com> Tested-by: Donghan Ryu <dryu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> 
Devs can disable SMP for debugging. However, there
was a build failure when CONFIG_SMP=n. This change
fixes it with minimum change. It looks like
headsmp.s and headsmp-t2.s cannot be removed from
Makefile since there are stuff used for both
multicore/unicore cpus in it.

Bug 809076

Change-Id: Idc440aa912a98f5decff4c59845af4918e504cd2
Reviewed-on: http://git-master/r/24843
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Tested-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>