linux-toradex.git/arch, branch v2.6.27.34

KVM: MMU: protect kvm_mmu_change_mmu_pages with mmu_lock

2009-09-09T03:17:29+00:00

(cherry picked from commit 7c8a83b75a38a807d37f5a4398eca2a42c8cf513)

kvm_handle_hva, called by MMU notifiers, manipulates mmu data only with
the protection of mmu_lock.

Update kvm_mmu_change_mmu_pages callers to take mmu_lock, thus protecting
against kvm_handle_hva.

Signed-off-by: Marcelo Tosatti 
Signed-off-by: Avi Kivity 
Signed-off-by: Greg Kroah-Hartman

KVM: x86: check for cr3 validity in mmu_alloc_roots

2009-09-09T03:17:28+00:00

(cherry picked from commit 8986ecc0ef58c96eec48d8502c048f3ab67fd8e2)

Verify the cr3 address stored in vcpu->arch.cr3 points to an existant
memslot. If not, inject a triple fault.

Signed-off-by: Marcelo Tosatti 
Signed-off-by: Avi Kivity 
Signed-off-by: Greg Kroah-Hartman

KVM: MMU: do not free active mmu pages in free_mmu_pages()

2009-09-09T03:17:25+00:00

(cherry picked from commit f00be0cae4e6ad0a8c7be381c6d9be3586800b3e)

free_mmu_pages() should only undo what alloc_mmu_pages() does.
Free mmu pages from the generic VM destruction function, kvm_destroy_vm().

Signed-off-by: Gleb Natapov 
Signed-off-by: Avi Kivity 
Signed-off-by: Greg Kroah-Hartman

KVM: Fix PDPTR reloading on CR4 writes

2009-09-09T03:17:24+00:00

(cherry picked from commit a2edf57f510cce6a389cc14e58c6ad0a4296d6f9)

The processor is documented to reload the PDPTRs while in PAE mode if any
of the CR4 bits PSE, PGE, or PAE change.  Linux relies on this
behaviour when zapping the low mappings of PAE kernels during boot.

The code already handled changes to CR4.PAE; augment it to also notice changes
to PSE and PGE.

This triggered while booting an F11 PAE kernel; the futex initialization code
runs before any CR3 reloads and writes to a NULL pointer; the futex subsystem
ended up uninitialized, killing PI futexes and pulseaudio which uses them.

Signed-off-by: Avi Kivity 
Signed-off-by: Greg Kroah-Hartman

KVM: Make paravirt tlb flush also reload the PAE PDPTRs

2009-09-09T03:17:23+00:00

(cherry picked from commit a8cd0244e9cebcf9b358d24c7e7410062f3665cb)

The paravirt tlb flush may be used not only to flush TLBs, but also
to reload the four page-directory-pointer-table entries, as it is used
as a replacement for reloading CR3.  Change the code to do the entire
CR3 reloading dance instead of simply flushing the TLB.

Signed-off-by: Avi Kivity 
Signed-off-by: Greg Kroah-Hartman

KVM: VMX: Handle vmx instruction vmexits

2009-09-09T03:17:21+00:00

(cherry picked from commit e3c7cb6ad7191e92ba89d00a7ae5f5dd1ca0c214)

IF a guest tries to use vmx instructions, inject a #UD to let it know the
instruction is not implemented, rather than crashing.

This prevents guest userspace from crashing the guest kernel.

Signed-off-by: Avi Kivity 
Signed-off-by: Greg Kroah-Hartman

KVM: Make EFER reads safe when EFER does not exist

2009-09-09T03:17:20+00:00

(cherry picked from commit e286e86e6d2042d67d09244aa0e05ffef75c9d54)

Some processors don't have EFER; don't oops if userspace wants us to
read EFER when we check NX.

Signed-off-by: Avi Kivity 
Signed-off-by: Greg Kroah-Hartman

KVM: SVM: Remove port 80 passthrough

2009-09-09T03:17:19+00:00

(cherry picked from commit 99f85a28a78e96d28907fe036e1671a218fee597)

KVM optimizes guest port 80 accesses by passthing them through to the host.
Some AMD machines die on port 80 writes, allowing the guest to hard-lock the
host.

Remove the port passthrough to avoid the problem.

Reported-by: Piotr Jaroszyński 
Tested-by: Piotr Jaroszyński 
Signed-off-by: Avi Kivity 
Signed-off-by: Greg Kroah-Hartman

KVM: VMX: Don't allow uninhibited access to EFER on i386

2009-09-09T03:17:17+00:00

(cherry picked from commit 16175a796d061833aacfbd9672235f2d2725df65)

vmx_set_msr() does not allow i386 guests to touch EFER, but they can still
do so through the default: label in the switch.  If they set EFER_LME, they
can oops the host.

Fix by having EFER access through the normal channel (which will check for
EFER_LME) even on i386.

Reported-and-tested-by: Benjamin Gilbert 
Signed-off-by: Avi Kivity 
Signed-off-by: Greg Kroah-Hartman

KVM: VMX: Set IGMT bit in EPT entry

2009-09-09T03:17:14+00:00

(cherry picked from commit 928d4bf747e9c290b690ff515d8f81e8ee226d97)

There is a potential issue that, when guest using pagetable without vmexit when
EPT enabled, guest would use PAT/PCD/PWT bits to index PAT msr for it's memory,
which would be inconsistent with host side and would cause host MCE due to
inconsistent cache attribute.

The patch set IGMT bit in EPT entry to ignore guest PAT and use WB as default
memory type to protect host (notice that all memory mapped by KVM should be WB).

Signed-off-by: Sheng Yang 
Signed-off-by: Avi Kivity 
Signed-off-by: Greg Kroah-Hartman