linux-toradex.git/arch, branch v2.6.28.6

x86: microcode_amd: fix wrong handling of equivalent CPU id

2009-02-17T17:29:05+00:00

commit 3c763fd77e66e55d029052da31df0abd9920cb1e upstream.

Impact: fix bug resulting in non-loaded AMD microcode

mc_header->processor_rev_id is a 2 byte value. Similar is true for
equiv_cpu in an equiv_cpu_entry -- only 2 bytes are of interest.

Signed-off-by: Andreas Herrmann 
Signed-off-by: Ingo Molnar 
Signed-off-by: Greg Kroah-Hartman

sparc64: Annotate sparc64 specific syscalls with SYSCALL_DEFINEx()

2009-02-17T17:29:01+00:00

[ Upstream commit e42650196df34789c825fa83f8bb37a5d5e52c14 ]

Signed-off-by: David S. Miller 
Signed-off-by: Greg Kroah-Hartman

sparc: Enable syscall wrappers for 64-bit (CVE-2009-0029)

2009-02-17T17:29:01+00:00

[ Upstream commit 67605d6812691bbd2158d2f60259e0407611bc1b ]

sparc64 needs sign-extended function parameters. We have to enable
the system call wrappers.

Signed-off-by: Christian Borntraeger 
Signed-off-by: David S. Miller 
Signed-off-by: Greg Kroah-Hartman

powerpc/fsl-booke: Fix mapping functions to use phys_addr_t

2009-02-17T17:28:50+00:00

commit 6c24b17453c8dc444a746e45b8a404498fc9fcf7 upstream.

Fixed v_mapped_by_tlbcam() and p_mapped_by_tlbcam() to use phys_addr_t
instead of unsigned long.  In 36-bit physical mode we really need these
functions to deal with phys_addr_t when trying to match a physical
address or when returning one.

Signed-off-by: Kumar Gala 
Signed-off-by: Greg Kroah-Hartman

x86, vmi: put a missing paravirt_release_pmd in pgd_dtor

2009-02-17T17:28:43+00:00

commit 55a8ba4b7f76bebd7e8ce3f74c04b140627a1bad upstream.

Commit 6194ba6ff6ccf8d5c54c857600843c67aa82c407 ("x86: don't special-case
pmd allocations as much") made changes to the way we handle pmd allocations,
and while doing that it dropped a call to  paravirt_release_pd on the
pgd page from the pgd_dtor code path.

As a result of this missing release, the hypervisor is now unaware of the
pgd page being freed, and as a result it ends up tracking this page as a
page table page.

After this the guest may start using the same page for other purposes, and
depending on what use the page is put to, it may result in various performance
and/or functional issues ( hangs, reboots).

Since this release is only required for VMI, I now release the pgd page from
the (vmi)_pgd_free hook.

Signed-off-by: Alok N Kataria 
Acked-by: Jeremy Fitzhardinge 
Signed-off-by: Ingo Molnar 
Signed-off-by: Greg Kroah-Hartman

PCI: return error on failure to read PCI ROMs

2009-02-12T17:50:35+00:00

commit 97c44836cdec1ea713a15d84098a1a908157e68f upstream.

This patch makes the ROM reading code return an error to user space if
the size of the ROM read is equal to 0.

The patch also emits a warnings if the contents of the ROM are invalid,
and documents the effects of the "enable" file on ROM reading.

Signed-off-by: Timothy S. Nelson 
Acked-by: Alex Villacis-Lasso 
Signed-off-by: Jesse Barnes 
Signed-off-by: Greg Kroah-Hartman

x86: APIC: enable workaround on AMD Fam10h CPUs

2009-02-12T17:50:27+00:00

commit 858770619debfb9269add63e4ba8b7c6b5538dd1 upstream.

Impact: fix to enable APIC for AMD Fam10h on chipsets with a missing/b0rked
	ACPI MP table (MADT)

Booting a 32bit kernel on an AMD Fam10h CPU running on chipsets with
missing/b0rked MP table leads to a hang pretty early in the boot process
due to the APIC not being initialized. Fix that by falling back to the
default APIC base address in 32bit code, as it is done in the 64bit
codepath.

Signed-off-by: Borislav Petkov 
Signed-off-by: H. Peter Anvin 
Signed-off-by: Greg Kroah-Hartman

prevent kprobes from catching spurious page faults

2009-02-12T17:50:24+00:00

commit 9be260a646bf76fa418ee519afa10196b3164681 upstream.

Prevent kprobes from catching spurious faults which will cause infinite
recursive page-fault and memory corruption by stack overflow.

Signed-off-by: Masami Hiramatsu 
Signed-off-by: Linus Torvalds 
Signed-off-by: Greg Kroah-Hartman

ACPI: Avoid array address overflow when _CST MWAIT hint bits are set

2009-02-06T21:47:23+00:00

commit 13b40a1a065824d2d4e55c8b48ea9f3f9d162929 upstream.

The Cx Register address obtained from the _CST object is used as the MWAIT
hints if the register type is FFixedHW. And it is used to check whether
the Cx type is supported or not.

On some boxes the following Cx state package is obtained from _CST object:
    >{
                ResourceTemplate ()
                {
                    Register (FFixedHW,
                        0x01,               // Bit Width
                        0x02,               // Bit Offset
                        0x0000000000889759, // Address
                        0x03,               // Access Size
                        )
                },

                0x03,
                0xF5,
                0x015E }

   In such case we should use the bit[7:4] of Cx address to check whether
the Cx type is supported or not.

mask the MWAIT hint to avoid array address overflow

Signed-off-by: Zhao Yakui 
Acked-by:Venki Pallipadi 
Signed-off-by: Len Brown 
Cc: Thomas Renninger

PCI: irq and pci_ids patch for Intel Tigerpoint DeviceIDs

2009-02-06T21:47:23+00:00

commit 57064d213d2e44654d4f13c66df135b5e7389a26 upstream.

This patch adds the Intel Tigerpoint LPC Controller DeviceIDs.

Signed-off-by: Seth Heasley 
Signed-off-by: Jesse Barnes 
Signed-off-by: Greg Kroah-Hartman