linux-toradex.git/arch, branch v3.16.3

MIPS: CPS: Initialize EVA before bringing up VPEs from secondary cores

2014-09-17T16:22:04+00:00

commit 6521d9a436a62e83ce57d6be6e5484e1098c1380 upstream.

The CPS code is doing several memory loads when configuring the VPEs
from secondary cores, so the segmentation control registers must be
initialized in time otherwise the kernel will crash with strange
TLB exceptions.

Reviewed-by: Paul Burton 
Signed-off-by: Markos Chandras 
Patchwork: http://patchwork.linux-mips.org/patch/7424/
Signed-off-by: James Hogan 
Signed-off-by: Greg Kroah-Hartman

MIPS: Malta: EVA: Rename 'eva_entry' to 'platform_eva_init'

2014-09-17T16:22:04+00:00

commit ca4d24f7954f3746742ba350c2276ff777f21173 upstream.

Rename 'eva_entry' to 'platform_eva_init' as required by the new
'eva_init' macro in the eva.h header. Since this macro is now used
in a platform dependent way, it must not depend on its caller so move
the t1 register initialization inside this macro. Also set the .reorder
assembler option in case the caller may have previously set .noreorder.
This may allow a few assembler optimizations. Finally include missing
headers and document the register usage for this macro.

Reviewed-by: Paul Burton 
Signed-off-by: Markos Chandras 
Patchwork: http://patchwork.linux-mips.org/patch/7423/
Signed-off-by: James Hogan 
Signed-off-by: Greg Kroah-Hartman

MIPS: EVA: Add new EVA header

2014-09-17T16:22:04+00:00

commit f85b71ceabb9d8d8a9e34b045b5c43ffde3623b3 upstream.

Generic code may need to perform certain operations when EVA is
enabled, for example, configure the segmentation registers during
boot. In order to avoid using more CONFIG_EVA ifdefs in the arch code,
such functions will be added in this header instead.
Initially this header contains a macro which will be used by generic
code later on during VPEs configuration on secondary cores.
All it does is to call the platform specific EVA init code in case
EVA is enabled.

Reviewed-by: Paul Burton 
Signed-off-by: Markos Chandras 
Patchwork: http://patchwork.linux-mips.org/patch/7422/
Signed-off-by: James Hogan 
Signed-off-by: Greg Kroah-Hartman

MIPS: OCTEON: make get_system_type() thread-safe

2014-09-17T16:22:04+00:00

commit 608308682addfdc7b8e2aee88f0e028331d88e4d upstream.

get_system_type() is not thread-safe on OCTEON. It uses static data,
also more dangerous issue is that it's calling cvmx_fuse_read_byte()
every time without any synchronization. Currently it's possible to get
processes stuck looping forever in kernel simply by launching multiple
readers of /proc/cpuinfo:

	(while true; do cat /proc/cpuinfo > /dev/null; done) &
	(while true; do cat /proc/cpuinfo > /dev/null; done) &
	...

Fix by initializing the system type string only once during the early
boot.

Signed-off-by: Aaro Koskinen 
Reviewed-by: Markos Chandras 
Patchwork: http://patchwork.linux-mips.org/patch/7437/
Signed-off-by: James Hogan 
Signed-off-by: Greg Kroah-Hartman

MIPS: Malta: Improve system memory detection for '{e, }memsize' >= 2G

2014-09-17T16:22:03+00:00

commit 64615682658373516863b5b5971ff1d922d0ae7b upstream.

Using kstrtol to parse the "{e,}memsize" variables was wrong because this
parses signed long numbers. In case of '{e,}memsize' >= 2G, the top bit
is set, resulting to -ERANGE errors and possibly random system memory
boundaries. We fix this by replacing "kstrtol" with "kstrtoul".
We also improve the code to check the kstrtoul return value and
print a warning if an error was returned.

Signed-off-by: Markos Chandras 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7543/
Signed-off-by: Ralf Baechle 
Signed-off-by: Greg Kroah-Hartman

MIPS: scall64-o32: Fix indirect syscall detection

2014-09-17T16:22:03+00:00

commit 5245689900804604fdc349c8d9b8985b0e401ae2 upstream.

Commit 4c21b8fd8f14 (MIPS: seccomp: Handle indirect system calls (o32))
added indirect syscall detection for O32 processes running on MIPS64
but it did not work as expected. The reason is the the scall64-o32
implementation differs compared to scall32-o32. In the former, the v0
(syscall number) register contains the absolute syscall number
(4000 + X) whereas in the latter it contains the relative syscall
number (X). Fix the code to avoid doing an extra addition, and load
the v0 register directly to the first argument for syscall_trace_enter.
Moreover, set the .reorder assembler option in order to have better
control on this part of the assembly code.

Signed-off-by: Markos Chandras 
Patchwork: http://patchwork.linux-mips.org/patch/7481/
Signed-off-by: James Hogan 
Signed-off-by: Greg Kroah-Hartman

MIPS: syscall: Fix AUDIT value for O32 processes on MIPS64

2014-09-17T16:22:03+00:00

commit 40381529f84c4cda3bd2d20cab6a707508856b21 upstream.

On MIPS64, O32 processes set both TIF_32BIT_ADDR and
TIF_32BIT_REGS so the previous condition treated O32 applications
as N32 when evaluating seccomp filters. Fix the condition to check
both TIF_32BIT_{REGS, ADDR} for the N32 AUDIT flag.

Signed-off-by: Markos Chandras 
Patchwork: http://patchwork.linux-mips.org/patch/7480/
Signed-off-by: James Hogan 
Signed-off-by: Greg Kroah-Hartman

MIPS: asm/reg.h: Make 32- and 64-bit definitions available at the same time

2014-09-17T16:22:03+00:00

commit bcec7c8da6b092b1ff3327fd83c2193adb12f684 upstream.

Get rid of the WANT_COMPAT_REG_H test and instead define both the 32-
and 64-bit register offset definitions at the same time with
MIPS{32,64}_ prefixes, then define the existing EF_* names to the
correct definitions for the kernel's bitness.

This patch is a prerequisite of the following bug fix patch.

Signed-off-by: Alex Smith 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7451/
Signed-off-by: Ralf Baechle 
Signed-off-by: Greg Kroah-Hartman

MIPS: Remove BUG_ON(!is_fpu_owner()) in do_ade()

2014-09-17T16:22:03+00:00

commit 2e5767a27337812f6850b3fa362419e2f085e5c3 upstream.

In do_ade(), is_fpu_owner() isn't preempt-safe. For example, when an
unaligned ldc1 is executed, do_cpu() is called and then FPU will be
enabled (and TIF_USEDFPU will be set for the current process). Then,
do_ade() is called because the access is unaligned.  If the current
process is preempted at this time, TIF_USEDFPU will be cleard.  So when
the process is scheduled again, BUG_ON(!is_fpu_owner()) is triggered.

This small program can trigger this BUG in a preemptible kernel:

int main (int argc, char *argv[])
{
        double u64[2];

        while (1) {
                asm volatile (
                        ".set push \n\t"
                        ".set noreorder \n\t"
                        "ldc1 $f3, 4(%0) \n\t"
                        ".set pop \n\t"
                        ::"r"(u64):
                );
        }

        return 0;
}

V2: Remove the BUG_ON() unconditionally due to Paul's suggestion.

Signed-off-by: Huacai Chen 
Signed-off-by: Jie Chen 
Signed-off-by: Rui Wang 
Cc: John Crispin 
Cc: Steven J. Hill 
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang 
Cc: Zhangjin Wu 
Signed-off-by: Ralf Baechle 
Signed-off-by: Greg Kroah-Hartman

MIPS: tlbex: Fix a missing statement for HUGETLB

2014-09-17T16:22:02+00:00

commit 8393c524a25609a30129e4a8975cf3b91f6c16a5 upstream.

In commit 2c8c53e28f1 (MIPS: Optimize TLB handlers for Octeon CPUs)
build_r4000_tlb_refill_handler() is modified. But it doesn't compatible
with the original code in HUGETLB case. Because there is a copy & paste
error and one line of code is missing. It is very easy to produce a bug
with LTP's hugemmap05 test.

Signed-off-by: Huacai Chen 
Signed-off-by: Binbin Zhou 
Cc: John Crispin 
Cc: Steven J. Hill 
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang 
Cc: Zhangjin Wu 
Patchwork: https://patchwork.linux-mips.org/patch/7496/
Signed-off-by: Ralf Baechle 
Signed-off-by: Greg Kroah-Hartman