linux-toradex.git/drivers/ata, branch v2.6.28.9

ata_piix: add workaround for Samsung DB-P70

2009-03-23T21:55:26+00:00

commit e9c1670c2a14ef9cc20d86b24b829f3947aad34e upstream.

Samsung DB-P70 somehow botched the first ICH9 SATA port.  The board
doesn't expose the first port but somehow SStatus reports link online
while failing SRST protocol leading to repeated probe failures and
thus long boot delay.

Because the BIOS doesn't carry any identifying DMI information, the
port can't be blacklisted safely.  Fortunately, the controller does
have subsystem vendor and ID set.  It's unclear whether the subsystem
IDs are used only for the board but it can be safely worked around by
disabling SIDPR access and just using SRST works around the problem.
Even when the workaround is triggered on an unaffected board the only
side effect will be missing SCR access.

Signed-off-by: Tejun Heo 
Reported-by: Joseph Jang 
Reported-by: Jonghyon Sohn 
Signed-off-by: Jeff Garzik 
Signed-off-by: Greg Kroah-Hartman

libata: make sure port is thawed when skipping resets

2009-03-17T00:32:19+00:00

commit d6515e6ff4ad3db4bd5ef2dd4e1026a7aca2482e upstream.

When SCR access is available and the link is offline, softreset is
skipped as it only wastes time and some controllers don't respond very
well.  However, the skip path forgot to thaw the port, which not only
blocks further event notification from the port but also causes
repeated EH invocations on the same event on drivers which rely on
->thaw() to clear events if the IRQ is shared with another device or
port.

This problem has always been there but is uncovered by recent sata_nv
nf2/3 change which dropped hardreset support while maintaining SCR
access.  nf2/3 doesn't clear hotplug event mask from the interrupt
handler but relies on ->thaw() to clear them.  When the hardreset was
there, the reset action was never skipped and the port was always
thawed but, with the hardreset gone, ->prereset() determines that
there's no need for softreset and both ->softreset() and ->thaw() are
skipped.  This leads to stuck hotplug event in the IRQ status register
triggering hotplug event whenever IRQ is delieverd on the same IRQ.
As the controller shares the same IRQ for both ports, this happens on
every IO if one port is occpupied and the other isn't.

This patch fixes the problem by making sure that the port is thawed on
reset-skip path.

bko#11615 reports this problem.

Signed-off-by: Tejun Heo 
Cc: Robert Hancock 
Reported-by: Dan Andresan 
Reported-by: Arne Woerner 
Reported-by: Stefan Lippers-Hollmann 
Signed-off-by: Jeff Garzik 
Signed-off-by: Greg Kroah-Hartman

libata: Don't trust current capacity values in identify words 57-58

2009-03-17T00:32:19+00:00

commit 968e594afdbc40b4270f9d4032ae8350475749d6 upstream.

Hanno Böck reported a problem where an old Conner CP30254 240MB hard drive
was reported as 1.1TB in capacity by libata:

http://lkml.org/lkml/2009/2/13/134

This was caused by libata trusting the drive's reported current capacity in
sectors in identify words 57 and 58 if the drive does not support LBA and the
current CHS translation values appear valid. Unfortunately it seems older
ATA specs were vague about what this field should contain and a number of drives
used values with wrong byte order or that were totally bogus. There's no
unique information that it conveys and so we can just calculate the number
of sectors from the reported current CHS values.

While we're at it, clean up this function to use named constants for the
identify word values.

Signed-off-by: Robert Hancock 
Signed-off-by: Jeff Garzik 
Signed-off-by: Greg Kroah-Hartman

Add support for VT6415 PCIE PATA IDE Host Controller

2009-02-20T22:40:21+00:00

commit 5955c7a2cfb6a35429adea5dc480002b15ca8cfc upstream.

Signed-off-by: Zlatko Calusic 
Signed-off-by: Linus Torvalds 
Signed-off-by: Greg Kroah-Hartman

sata_nv: give up hardreset on nf2

2009-02-20T22:40:18+00:00

commit 7dac745b8e367c99175b8f0d014d996f0e5ed9e5 upstream.

Kernel bz#12176 reports that nf2 hardreset simply doesn't work.  Give
up.  Argh...

Signed-off-by: Tejun Heo 
Cc: Robert Hancock 
Reported-by: Saro 
Signed-off-by: Jeff Garzik 
Signed-off-by: Greg Kroah-Hartman

libata: fix EH device failure handling

2009-02-17T17:29:03+00:00

commit d89293abd95bfd7dd9229087d6c30c1464c5ac83 upstream.

The dev->pio_mode > XFER_PIO_0 test is there to avoid unnecessary
speed down warning messages but it accidentally disabled SATA link spd
down during configuration phase after reset where PIO mode is always
zero.

This patch fixes the problem by moving the test where it belongs.
This makes libata probing sequence behave better when the connection
is flaky at higher link speeds which isn't too uncommon for eSATA
devices.

Signed-off-by: Tejun Heo 
Signed-off-by: Jeff Garzik 
Cc: Chuck Ebbert 
Signed-off-by: Greg Kroah-Hartman

sata_via: Add VT8261 support

2009-02-12T17:50:38+00:00

commit 6813952021a7820a505002de260bda36978671f7 upstream.

Signed-off-by: Joseph Chan 
Signed-off-by: Jeff Garzik 
Signed-off-by: Greg Kroah-Hartman

sata_mv: Fix chip type for Hightpoint RocketRaid 1740/1742

2009-02-06T21:47:24+00:00

commit 4462254ac6be9150aae87d54d388fc348d6fcead upstream.

Fix chip type for the Highpoint RocketRAID 1740 and 1742 PCI cards.
These really do have Marvell 6042 chips on them, rather than the 5081 chip.

Confirmed by multiple (two) users (for the 1740), and by examining
the product photographs from Highpoint's web site.

Signed-off-by: Mark Lord 
Signed-off-by: Jeff Garzik 
Signed-off-by: Greg Kroah-Hartman

sata_nv: ck804 has borked hardreset too

2009-02-06T21:47:19+00:00

commit 8d993eaa9c3c61b8a5929a7f695078a1fcfb4869 upstream.

While playing with nvraid, I found out that rmmoding and insmoding
often trigger hardreset failure on the first port (the second one was
always okay).  Seriously, how diverse can you get with hardreset
behaviors?  Anyways, make ck804 use noclassify variant too.

Signed-off-by: Tejun Heo 
Signed-off-by: Jeff Garzik 
Signed-off-by: Greg Kroah-Hartman

sata_nv: fix MCP5x reset

2009-02-06T21:47:19+00:00

commit 2d775708bc6613f1be47f1e720781343341ecc94 upstream.

MCP5x family of controllers seem to share much more with nf2's as far
as reset protocol is concerned.  It requires heardreset to get the PHY
going and classfication code report after hardreset is unreliable.
Create a new board type MCP5x and use noclassify hardreset.  SWNCQ is
modified to inherit from this new type.

This fixes hotplug regression reported in kernel bz#12351.

Signed-off-by: Tejun Heo 
Signed-off-by: Jeff Garzik 
Signed-off-by: Greg Kroah-Hartman