<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/ata, branch v3.2.42</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>ahci: Add Device IDs for Intel Wellsburg PCH</title>
<updated>2013-03-20T15:03:26+00:00</updated>
<author>
<name>James Ralston</name>
<email>james.d.ralston@intel.com</email>
</author>
<published>2013-02-09T01:34:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fea5417579faa777befe2ad4f111e3fa6f2675b1'/>
<id>fea5417579faa777befe2ad4f111e3fa6f2675b1</id>
<content type='text'>
commit 151743fd8dfb02956c5184b5f4f0f42677eb75bc upstream.

This patch adds the AHCI-mode SATA Device IDs for the Intel Wellsburg PCH

Signed-off-by: James Ralston &lt;james.d.ralston@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 151743fd8dfb02956c5184b5f4f0f42677eb75bc upstream.

This patch adds the AHCI-mode SATA Device IDs for the Intel Wellsburg PCH

Signed-off-by: James Ralston &lt;james.d.ralston@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ahci: AHCI-mode SATA patch for Intel Avoton DeviceIDs</title>
<updated>2013-03-20T15:03:26+00:00</updated>
<author>
<name>Seth Heasley</name>
<email>seth.heasley@intel.com</email>
</author>
<published>2013-01-25T20:01:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=766c2c591e346254e56867d08203ecbb8a6bfb0c'/>
<id>766c2c591e346254e56867d08203ecbb8a6bfb0c</id>
<content type='text'>
commit 29e674dd5c8e781589f09c3ee139c80f6da274e4 upstream.

This patch adds the AHCI and RAID-mode SATA DeviceIDs for the Intel Avoton SOC.

Signed-off-by: Seth Heasley &lt;seth.heasley@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 29e674dd5c8e781589f09c3ee139c80f6da274e4 upstream.

This patch adds the AHCI and RAID-mode SATA DeviceIDs for the Intel Avoton SOC.

Signed-off-by: Seth Heasley &lt;seth.heasley@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ahci: Add Device IDs for Intel Lynx Point-LP PCH</title>
<updated>2013-03-20T15:03:25+00:00</updated>
<author>
<name>James Ralston</name>
<email>james.d.ralston@intel.com</email>
</author>
<published>2012-08-09T16:02:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=5333b150a47169ce354da77700503e36c899e8ba'/>
<id>5333b150a47169ce354da77700503e36c899e8ba</id>
<content type='text'>
commit 77b12bc9cf7b10c7c1a04ca45272fbb4287902d0 upstream.

This patch adds the AHCI-mode SATA Device IDs for the Intel Lynx Point-LP PCH

Signed-off-by: James Ralston &lt;james.d.ralston@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 77b12bc9cf7b10c7c1a04ca45272fbb4287902d0 upstream.

This patch adds the AHCI-mode SATA Device IDs for the Intel Lynx Point-LP PCH

Signed-off-by: James Ralston &lt;james.d.ralston@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ahci: AHCI-mode SATA patch for Intel Lynx Point DeviceIDs</title>
<updated>2013-03-20T15:03:25+00:00</updated>
<author>
<name>Seth Heasley</name>
<email>seth.heasley@intel.com</email>
</author>
<published>2012-01-24T00:27:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=eb4d7add813c6980d73d0bae90572b6f56535552'/>
<id>eb4d7add813c6980d73d0bae90572b6f56535552</id>
<content type='text'>
commit ea4ace66782fc35245133d2766f38d62827761cc upstream.

This patch adds the AHCI-mode SATA DeviceIDs for the Intel Lynx Point PCH.

Signed-off-by: Seth Heasley &lt;seth.heasley@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit ea4ace66782fc35245133d2766f38d62827761cc upstream.

This patch adds the AHCI-mode SATA DeviceIDs for the Intel Lynx Point PCH.

Signed-off-by: Seth Heasley &lt;seth.heasley@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ata_piix: Add Device IDs for Intel Wellsburg PCH</title>
<updated>2013-03-06T03:24:23+00:00</updated>
<author>
<name>James Ralston</name>
<email>james.d.ralston@intel.com</email>
</author>
<published>2013-02-09T01:24:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=2a1b9ce3428210c050dc34d4eaa64aa7e258c0fb'/>
<id>2a1b9ce3428210c050dc34d4eaa64aa7e258c0fb</id>
<content type='text'>
commit 3aee8bc52c415aba8148f144e5e5359b0fd75dd1 upstream.

This patch adds the IDE-mode SATA Device IDs for the Intel Wellsburg PCH

Signed-off-by: James Ralston &lt;james.d.ralston@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 3aee8bc52c415aba8148f144e5e5359b0fd75dd1 upstream.

This patch adds the IDE-mode SATA Device IDs for the Intel Wellsburg PCH

Signed-off-by: James Ralston &lt;james.d.ralston@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ata_piix: IDE-mode SATA patch for Intel Avoton DeviceIDs</title>
<updated>2013-03-06T03:24:23+00:00</updated>
<author>
<name>Seth Heasley</name>
<email>seth.heasley@intel.com</email>
</author>
<published>2013-01-25T19:57:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=117d2e32af3d29b516594775c0cdc93adbf2f24c'/>
<id>117d2e32af3d29b516594775c0cdc93adbf2f24c</id>
<content type='text'>
commit aaa515277db9585eeb4fdeb4637b9f9df50a1dd9 upstream.

This patch adds the IDE-mode SATA DeviceIDs for the Intel Avoton SOC.

Signed-off-by: Seth Heasley &lt;seth.heasley@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit aaa515277db9585eeb4fdeb4637b9f9df50a1dd9 upstream.

This patch adds the IDE-mode SATA DeviceIDs for the Intel Avoton SOC.

Signed-off-by: Seth Heasley &lt;seth.heasley@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ata_piix: Add Device IDs for Intel Lynx Point-LP PCH</title>
<updated>2013-03-06T03:24:23+00:00</updated>
<author>
<name>James Ralston</name>
<email>james.d.ralston@intel.com</email>
</author>
<published>2012-08-09T16:34:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=d3493114eccc62a0a74f183adaf1fbb58f3bfc38'/>
<id>d3493114eccc62a0a74f183adaf1fbb58f3bfc38</id>
<content type='text'>
commit 389cd784969e9148fedcde0608f15bd74d6b769e upstream.

This patch adds the IDE-mode SATA Device IDs for the Intel Lynx Point-LP PCH

Signed-off-by: James Ralston &lt;james.d.ralston@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 389cd784969e9148fedcde0608f15bd74d6b769e upstream.

This patch adds the IDE-mode SATA Device IDs for the Intel Lynx Point-LP PCH

Signed-off-by: James Ralston &lt;james.d.ralston@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ata_piix: IDE-mode SATA patch for Intel DH89xxCC DeviceIDs</title>
<updated>2013-03-06T03:24:22+00:00</updated>
<author>
<name>Seth Heasley</name>
<email>seth.heasley@intel.com</email>
</author>
<published>2012-02-21T18:45:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=745544cbd47e3ec3219ed1bd6170036d356470bc'/>
<id>745544cbd47e3ec3219ed1bd6170036d356470bc</id>
<content type='text'>
commit 96d5d96aedc29c75bb16433f6ecf8664ec3c1b46 upstream.

This patch adds the IDE-mode SATA DeviceIDs for the Intel DH89xxCC PCH.

Signed-off-by: Seth Heasley &lt;seth.heasley@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 96d5d96aedc29c75bb16433f6ecf8664ec3c1b46 upstream.

This patch adds the IDE-mode SATA DeviceIDs for the Intel DH89xxCC PCH.

Signed-off-by: Seth Heasley &lt;seth.heasley@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ata_piix: IDE-mode SATA patch for Intel Lynx Point DeviceIDs</title>
<updated>2013-03-06T03:24:22+00:00</updated>
<author>
<name>Seth Heasley</name>
<email>seth.heasley@intel.com</email>
</author>
<published>2012-01-24T00:29:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=18e7222c4c2df0db0a33bc300a39e8bfa55e50bf'/>
<id>18e7222c4c2df0db0a33bc300a39e8bfa55e50bf</id>
<content type='text'>
commit 78140cfec503c60a178b11fbaae2fef63e9abdc0 upstream.

This patch adds the IDE-mode SATA DeviceIDs for the Intel Lynx Point PCH.

Signed-off-by: Seth Heasley &lt;seth.heasley@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 78140cfec503c60a178b11fbaae2fef63e9abdc0 upstream.

This patch adds the IDE-mode SATA DeviceIDs for the Intel Lynx Point PCH.

Signed-off-by: Seth Heasley &lt;seth.heasley@intel.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ahci: Add support for Enmotus Bobcat device.</title>
<updated>2013-02-20T03:15:28+00:00</updated>
<author>
<name>Hugh Daschbach</name>
<email>hugh.daschbach@enmotus.com</email>
</author>
<published>2013-01-04T22:39:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=f50fa70d35d3df3230ed51dcea309660183570ac'/>
<id>f50fa70d35d3df3230ed51dcea309660183570ac</id>
<content type='text'>
commit 7f9c9f8e24590e7dcd26ca408458c43df5b83e61 upstream.

Silicon does not support standard AHCI BAR assignment.  Add
vendor/device exception to force BAR 2.

Signed-off-by: Hugh Daschbach &lt;hugh.daschbach@enmotus.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 7f9c9f8e24590e7dcd26ca408458c43df5b83e61 upstream.

Silicon does not support standard AHCI BAR assignment.  Add
vendor/device exception to force BAR 2.

Signed-off-by: Hugh Daschbach &lt;hugh.daschbach@enmotus.com&gt;
Signed-off-by: Jeff Garzik &lt;jgarzik@redhat.com&gt;
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</pre>
</div>
</content>
</entry>
</feed>
