<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/base/regmap/regcache.c, branch T20_LinuxImageV2.0_20130305</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>regmap: implement register striding</title>
<updated>2012-04-15T21:58:10+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2012-04-09T19:40:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=48f282fdd1833460e1ee5fc1a9e3008fcede3b38'/>
<id>48f282fdd1833460e1ee5fc1a9e3008fcede3b38</id>
<content type='text'>
regmap_config.reg_stride is introduced. All extant register addresses
are a multiple of this value. Users of serial-oriented regmap busses will
typically set this to 1. Users of the MMIO regmap bus will typically set
this based on the value size of their registers, in bytes, so 4 for a
32-bit register.

Throughout the regmap code, actual register addresses are used. Wherever
the register address is used to index some array of values, the address
is divided by the stride to determine the index, or vice-versa. Error-
checking is added to all entry-points for register address data to ensure
that register addresses actually satisfy the specified stride. The MMIO
bus ensures that the specified stride is large enough for the register
size.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit f01ee60fffa4dc6c77122121233a793f7f696e67)

Change-Id: I634977dcb0fe9ff95c7932e9195a2c1918eb1c18
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96510
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
regmap_config.reg_stride is introduced. All extant register addresses
are a multiple of this value. Users of serial-oriented regmap busses will
typically set this to 1. Users of the MMIO regmap bus will typically set
this based on the value size of their registers, in bytes, so 4 for a
32-bit register.

Throughout the regmap code, actual register addresses are used. Wherever
the register address is used to index some array of values, the address
is divided by the stride to determine the index, or vice-versa. Error-
checking is added to all entry-points for register address data to ensure
that register addresses actually satisfy the specified stride. The MMIO
bus ensures that the specified stride is large enough for the register
size.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit f01ee60fffa4dc6c77122121233a793f7f696e67)

Change-Id: I634977dcb0fe9ff95c7932e9195a2c1918eb1c18
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96510
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>regmap: introduce fast_io busses, and use a spinlock for them</title>
<updated>2012-04-15T21:18:17+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2012-04-04T21:48:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=77a38d8012fd6603e25eb3aa7a012856ab0a6ae8'/>
<id>77a38d8012fd6603e25eb3aa7a012856ab0a6ae8</id>
<content type='text'>
Some bus types have very fast IO. For these, acquiring a mutex for every
IO operation is a significant overhead. Allow busses to indicate their IO
is fast, and enhance regmap to use a spinlock for those busses.

[Currently limited to native endian registers -- broonie]

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit bacdbe077342ecc9e7b3e374cc5a41995116706a)

Change-Id: I337f27a09f2b176b46e8f6d05401957a1abc0609
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96503
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some bus types have very fast IO. For these, acquiring a mutex for every
IO operation is a significant overhead. Allow busses to indicate their IO
is fast, and enhance regmap to use a spinlock for those busses.

[Currently limited to native endian registers -- broonie]

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit bacdbe077342ecc9e7b3e374cc5a41995116706a)

Change-Id: I337f27a09f2b176b46e8f6d05401957a1abc0609
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96503
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>regmap: Export regcache_sync_region()</title>
<updated>2012-04-15T21:07:04+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2012-04-03T12:08:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=e42eab476ec6a043814608b1375c1632c86fba74'/>
<id>e42eab476ec6a043814608b1375c1632c86fba74</id>
<content type='text'>
regcache_sync_region() isn't going to be useful to most drivers if we
don't export it since otherwise they can't use it when built modular.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit e466de05194b666114713b753e2f4be1d4200140)

Change-Id: I38b12c791f0a462ebbbfbe4a6b25cfa3265ffacc
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96500
Reviewed-by: Automatic_Commit_Validation_User
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
regcache_sync_region() isn't going to be useful to most drivers if we
don't export it since otherwise they can't use it when built modular.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit e466de05194b666114713b753e2f4be1d4200140)

Change-Id: I38b12c791f0a462ebbbfbe4a6b25cfa3265ffacc
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96500
Reviewed-by: Automatic_Commit_Validation_User
</pre>
</div>
</content>
</entry>
<entry>
<title>regmap: Allow drivers to sync only part of the register cache</title>
<updated>2012-04-15T20:50:26+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2012-02-23T20:53:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=fe5d7a370e86d9a3ba10e94f834bd3d2619d0f73'/>
<id>fe5d7a370e86d9a3ba10e94f834bd3d2619d0f73</id>
<content type='text'>
Provide a regcache_sync_region() operation which allows drivers to
write only part of the cache back to the hardware. This is intended
for use in cases like power domains or DSP memories where part of the
device register map may be reset without fully resetting the device.

Fully supporting these devices is likely to require additional work to
make specific regions of the register map cache only while they are in
reset, but this is enough for most devices.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit 4d4cfd1656b5f6c88eae51c40741a695b108b006)

Change-Id: Ia8cccf7986611485ae090e234bb68084671d7641
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96490
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Provide a regcache_sync_region() operation which allows drivers to
write only part of the cache back to the hardware. This is intended
for use in cases like power domains or DSP memories where part of the
device register map may be reset without fully resetting the device.

Fully supporting these devices is likely to require additional work to
make specific regions of the register map cache only while they are in
reset, but this is enough for most devices.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit 4d4cfd1656b5f6c88eae51c40741a695b108b006)

Change-Id: Ia8cccf7986611485ae090e234bb68084671d7641
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96490
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>regmap: Supply ranges to the sync operations</title>
<updated>2012-04-15T20:44:41+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2012-02-23T19:31:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=9d586b202c93d646167b235864e0cd21b2b2c87c'/>
<id>9d586b202c93d646167b235864e0cd21b2b2c87c</id>
<content type='text'>
In order to allow us to support partial sync operations add minimum and
maximum register arguments to the sync operation and update the rbtree
and lzo caches to use this new information. The LZO implementation is
obviously not good, we could exit the iteration earlier, but there may
be room for more wide reaching optimisation there.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit ac8d91c801905a061ca883dca427a5e19602a1e7)

Change-Id: I92ceee1c704ea7c864bff0559d36cf34554c3ba5
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96489
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In order to allow us to support partial sync operations add minimum and
maximum register arguments to the sync operation and update the rbtree
and lzo caches to use this new information. The LZO implementation is
obviously not good, we could exit the iteration earlier, but there may
be room for more wide reaching optimisation there.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit ac8d91c801905a061ca883dca427a5e19602a1e7)

Change-Id: I92ceee1c704ea7c864bff0559d36cf34554c3ba5
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96489
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>regmap: Add tracepoints for cache only and cache bypass</title>
<updated>2012-04-15T20:39:14+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2012-02-23T22:02:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=0b2d70ca84d177d69e7a500945e1caaa758bfca2'/>
<id>0b2d70ca84d177d69e7a500945e1caaa758bfca2</id>
<content type='text'>
Useful for figuring out where the hardware interaction went or came from.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit 5d5b7d4f80ed6e861c1c220fd57e3dad0912526e)

Change-Id: Ie7c0659458a3a4a2f100d86db552c606d9da0e6b
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96488
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Useful for figuring out where the hardware interaction went or came from.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit 5d5b7d4f80ed6e861c1c220fd57e3dad0912526e)

Change-Id: Ie7c0659458a3a4a2f100d86db552c606d9da0e6b
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96488
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>regmap: Mark the cache as clean after a successful sync</title>
<updated>2012-04-15T20:33:55+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2012-02-23T22:05:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=24dbfb8fceed820307da57a185440a967956d547'/>
<id>24dbfb8fceed820307da57a185440a967956d547</id>
<content type='text'>
Previously the cache would never be marked clean, meaning syncs would
never be suppressed which isn't the end of the world but could be
inefficient.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit 6ff7373809a9b4eb644d83e2e299da297e1cbffa)

Change-Id: I52aef73bc6bc0df10dd64da92d0bf591e44ddc0e
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96487
Reviewed-by: Automatic_Commit_Validation_User
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously the cache would never be marked clean, meaning syncs would
never be suppressed which isn't the end of the world but could be
inefficient.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit 6ff7373809a9b4eb644d83e2e299da297e1cbffa)

Change-Id: I52aef73bc6bc0df10dd64da92d0bf591e44ddc0e
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96487
Reviewed-by: Automatic_Commit_Validation_User
</pre>
</div>
</content>
</entry>
<entry>
<title>regmap: Remove default cache sync implementation</title>
<updated>2012-04-15T20:33:44+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2012-02-23T20:48:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=01b30d0d2ab37eec4a5232e4fcf02716662830a3'/>
<id>01b30d0d2ab37eec4a5232e4fcf02716662830a3</id>
<content type='text'>
It's not used as all cache types have sync operations so it's just dead
code which never gets tested.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit c3ec23288a92e20e0aff84a4cb6fbc7cc9bcf567)

Change-Id: I3ba8c8afee9a7c945dc0a52e87c9f4a357e79308
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96486
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It's not used as all cache types have sync operations so it's just dead
code which never gets tested.

Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit c3ec23288a92e20e0aff84a4cb6fbc7cc9bcf567)

Change-Id: I3ba8c8afee9a7c945dc0a52e87c9f4a357e79308
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96486
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>regmap: Implement support for 32 bit registers and values</title>
<updated>2012-04-15T20:22:29+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@opensource.wolfsonmicro.com</email>
</author>
<published>2012-02-17T23:58:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=8d5017795c0e7d407852bae55452ae979b45071f'/>
<id>8d5017795c0e7d407852bae55452ae979b45071f</id>
<content type='text'>
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit 7d5e525b9ceda0e3b85da0acdaa2de19fea51edc)

Change-Id: I6f6fec44b439b4916eba7f32ece1fa011e3ac021
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96480
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit 7d5e525b9ceda0e3b85da0acdaa2de19fea51edc)

Change-Id: I6f6fec44b439b4916eba7f32ece1fa011e3ac021
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/96480
Reviewed-by: Simone Willett &lt;swillett@nvidia.com&gt;
Tested-by: Simone Willett &lt;swillett@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>regmap: Bypassing cache when initializing cache</title>
<updated>2012-03-05T16:01:24+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2012-02-17T13:27:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=dc3c59847d3282271507e75a82a9d60b2dad7d9a'/>
<id>dc3c59847d3282271507e75a82a9d60b2dad7d9a</id>
<content type='text'>
During regcache_init, if client has not passed the
default data of cached register then it is directly
read from the hw to initialize cache. This hw register
read happens before cache ops are initialized and hence
avoiding register read to check for the data available
on cache or not by enabling flag of cache_bypass.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit df00c79f78d8b0ad788daf689ea461ace9d0811f)

Change-Id: I4398162bd6b12689c795afe5ee02397e975e456c
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/87593
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
During regcache_init, if client has not passed the
default data of cached register then it is directly
read from the hw to initialize cache. This hw register
read happens before cache ops are initialized and hence
avoiding register read to check for the data available
on cache or not by enabling flag of cache_bypass.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Signed-off-by: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;
(cherry picked from commit df00c79f78d8b0ad788daf689ea461ace9d0811f)

Change-Id: I4398162bd6b12689c795afe5ee02397e975e456c
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-on: http://git-master/r/87593
</pre>
</div>
</content>
</entry>
</feed>
