linux-toradex.git/drivers/bus/stm32_etzpc.c, branch v7.2-rc5 Linux kernel for Apalis and Colibri modules bus: firewall: move stm32_firewall header file in include folder 2026-03-25T16:40:21+00:00 Clément Le Goffic clement.legoffic@foss.st.com 2026-02-10T19:05:45+00:00 698753e4a51a5a6670d527a3db084c3616253abc Other driver than RIFSC and ETZPC can implement firewall ops, such as RCC. In order for them to have access to the ops and type of this framework, we need to get the `stm32_firewall.h` file in the include/ folder. Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Signed-off-by: Clément Le Goffic <legoffic.clement@gmail.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Link: https://lore.kernel.org/r/20260210-b4-firewall-upstream-v8-1-097c1e47af82@gmail.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> 
Other driver than RIFSC and ETZPC can implement firewall ops, such as
RCC.
In order for them to have access to the ops and type of this framework,
we need to get the `stm32_firewall.h` file in the include/ folder.

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Signed-off-by: Clément Le Goffic <legoffic.clement@gmail.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20260210-b4-firewall-upstream-v8-1-097c1e47af82@gmail.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
bus: etzpc: introduce ETZPC firewall controller driver 2024-04-25T12:44:39+00:00 Gatien Chevallier gatien.chevallier@foss.st.com 2024-01-05T13:04:00+00:00 2eeb74c449e910851fa48f4868ec0edadaa28f08 ETZPC is a peripheral and memory firewall controller that filter accesses based on Arm TrustZone secure state and Arm CPU privilege execution level. It handles MCU isolation as well. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> 
ETZPC is a peripheral and memory firewall controller that filter accesses
based on Arm TrustZone secure state and Arm CPU privilege execution level.
It handles MCU isolation as well.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>