<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/cache/starfive_starlink_cache.c, branch v6.19</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>cache: Add StarFive StarLink cache management</title>
<updated>2024-05-28T11:34:11+00:00</updated>
<author>
<name>Joshua Yeong</name>
<email>joshua.yeong@starfivetech.com</email>
</author>
<published>2024-05-15T05:02:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=cabff60ca77da6cb460988e2af40bde95776d92b'/>
<id>cabff60ca77da6cb460988e2af40bde95776d92b</id>
<content type='text'>
Add StarFive Starlink cache management driver.
The driver enables RISC-V non-standard cache
operation on SoC that does not support Zicbom
extension instructions.

Signed-off-by: Joshua Yeong &lt;joshua.yeong@starfivetech.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add StarFive Starlink cache management driver.
The driver enables RISC-V non-standard cache
operation on SoC that does not support Zicbom
extension instructions.

Signed-off-by: Joshua Yeong &lt;joshua.yeong@starfivetech.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</pre>
</div>
</content>
</entry>
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