linux-toradex.git/drivers/cache, branch master

Merge tag 'cache-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers

2026-10-16T16:44:27+00:00

standalone cache drivers for v7.4

Three low-priority bugfixes for issues in the hisi hha and sifive ccache
drivers as well as the core code.

Signed-off-by: Conor Dooley 

* tag 'cache-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  cache: Make cpu_cache_invalidate_memregion() error out if there are no handlers
  cache: sifive_ccache: Remove redundant dev_err_probe()
  cache: hisi_soc_hha: use named initializers for acpi_device_id

Signed-off-by: Arnd Bergmann

cache: sifive_ccache: Remove redundant dev_err_probe()

2026-09-08T18:19:55+00:00

Since commit 55b48e23f5c4 ("genirq/devres: Add error handling in
devm_request_*_irq()"), devm_request_irq() automatically logs
detailed error messages on failure. Remove the now-redundant
driver-specific dev_err_probe() calls.

Signed-off-by: Pan Chuang 
Signed-off-by: Conor Dooley

cache: hisi_soc_hha: use named initializers for acpi_device_id

2026-08-10T14:55:20+00:00

Use a named initializer for the acpi_device_id fields which
makes the code more readable and consistent with how lists
are initialized in the rest of the kernel code base.

Signed-off-by: Pawel Zalewski (The Capable Hub) 
Reviewed-by: Yushan Wang 
Acked-by: Jonathan Cameron 
Signed-off-by: Conor Dooley

Replace by more specific (c files)

2026-07-03T05:38:17+00:00

Replace the #include of  by the more specific
 where applicable. For most cases the include
can be dropped completely, only a few drivers need one or two headers
added.

Acked-by: Danilo Krummrich 
Acked-by: Takashi Sakamoto 
Acked-by: Bjorn Helgaas 
Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König (The Capable Hub)

cache: sifive_ccache: Add StarFive JH7110 SoC support

2026-05-21T10:12:00+00:00

This cache controller is also used on the StarFive JH7110 SoC. It does
not have the data-uncorrectable ECC quirk that JH7100 has, so only
QUIRK_NONSTANDARD_CACHE_OPS is set.

Signed-off-by: Dominique Belhachemi 
Signed-off-by: Conor Dooley

cache: ax45mp: Fix device node reference leak in ax45mp_cache_init()

2026-02-06T19:54:40+00:00

In ax45mp_cache_init(), of_find_matching_node() returns a device node
with an incremented reference count that must be released with
of_node_put(). The current code fails to call of_node_put() which
causes a reference leak.

Use the __free(device_node) attribute to ensure automatic cleanup when
the variable goes out of scope.

Fixes: d34599bcd2e4 ("cache: Add L2 cache management for Andes AX45MP RISC-V core")
Signed-off-by: Felix Gu 
Signed-off-by: Conor Dooley

cache: starfive: fix device node leak in starlink_cache_init()

2026-02-06T19:54:27+00:00

of_find_matching_node() returns a device_node with refcount incremented.

Use __free(device_node) attribute to automatically call of_node_put()
when the variable goes out of scope, preventing the refcount leak.

Fixes: cabff60ca77d ("cache: Add StarFive StarLink cache management")
Signed-off-by: Felix Gu 
Reviewed-by: Jonathan Cameron 
Signed-off-by: Conor Dooley

cache: Support cache maintenance for HiSilicon SoC Hydra Home Agent

2025-11-21T18:42:02+00:00

Hydra Home Agent is a device used to maintain cache coherency. Add support
for explicit cache maintenance operations using it. A system has multiple
of these agents. Whilst only one agent is responsible for a given cache
line, interleave means that for a range operation, responsibility for the
cache lines making up the range will typically be spread across multiple
instances.

Put this driver on a new Kconfig menu under drivers/cache. The short
description as memory hotplug like operations is intended to cover
the somewhat complex set of cases where this unit applies and differentiate
it clearly from typical non coherent DMA flows.

Co-developed-by: Yicong Yang 
Signed-off-by: Yicong Yang 
Signed-off-by: Yushan Wang 
Signed-off-by: Jonathan Cameron 
Signed-off-by: Conor Dooley

cache: Make top level Kconfig menu a boolean dependent on RISCV

2025-11-21T18:42:02+00:00

The next patch will add a new type of cache maintenance driver responsible
for flushing deeper than is necessary for non coherent DMA (current
use case of drivers/cache drivers), as needed when performing operations
such as memory hotplug and security unlocking of persistent memory. The two
types of operation are similar enough to share a drivers/cache directory
and MAINTAINERS but are otherwise currently unrelated.

To avoid confusion have two separate menus. Each has dependencies that are
implemented by making them boolean symbols, here CACHEMAINT_FOR_DMA
which is dependent on RISCV as all driver are currently for platforms of
that architecture. Set new symbol default to y to avoid breaking existing
configs. This has no affect on actual code built, just visibility of the
menu.

Suggested-by: Arnd Bergmann 
Signed-off-by: Jonathan Cameron 
Signed-off-by: Conor Dooley

cache: sifive_ccache: Optimize cache flushes

2025-09-11T18:13:21+00:00

Fence instructions are required only at the beginning and the end of
a flush operation, not separately for each cache line being flushed.
Speed up cache flushes by about 15% by removing the extra fences.

Signed-off-by: Samuel Holland 
Signed-off-by: Conor Dooley