- Support qcom SM8150/SM8250 video and display clks - Change how qcom's display port clks work * clk-ingenic: clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL clk: ingenic: Use readl_poll_timeout instead of custom loop clk: ingenic: Use to_clk_info() macro for all clocks * clk-at91: clk: at91: sam9x60: support only two programmable clocks clk: at91: clk-sam9x60-pll: remove unused variable clk: at91: clk-main: update key before writing AT91_CKGR_MOR clk: at91: remove the checking of parent_name * clk-kconfig: clk: Restrict CLK_HSDK to ARC_SOC_HSDK * clk-imx: clk: imx8mq: Fix usdhc parents order clk: imx: imx21: Remove clock driver clk: imx: gate2: Fix a few typos clk: imx: Fix and update kerneldoc clk: imx: fix i.MX7D peripheral clk mux flags clk: imx: fix composite peripheral flags clk: imx: Correct the memrepair clock on imx8mp clk: imx: Correct the root clk of media ldb on imx8mp clk: imx: vf610: Add CRC clock clk: imx: Explicitly include bits.h clk: imx8qxp: Support building i.MX8QXP clock driver as module clk: imx8m: Support module build clk: imx: Add clock configuration for ARMv7 platforms clk: imx: Support building i.MX common clock driver as module clk: composite: Export clk_hw_register_composite() clk: imx6sl: Use BIT(x) to avoid shifting signed 32-bit value by 31 bits * clk-qcom: clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on clk: qcom: Add display clock controller driver for SM8150 and SM8250 dt-bindings: clock: add QCOM SM8150 and SM8250 display clock bindings clk: qcom: add video clock controller driver for SM8250 clk: qcom: add video clock controller driver for SM8150 dt-bindings: clock: add SM8250 QCOM video clock bindings dt-bindings: clock: add SM8150 QCOM video clock bindings dt-bindings: clock: combine qcom,sdm845-videocc and qcom,sc7180-videocc clk: qcom: gcc-msm8994: Add missing clocks, resets and GDSCs clk/qcom: fix spelling typo clk: qcom: gcc-sdm660: Fix wrong parent_map clk: qcom: dispcc: Update DP clk ops for phy design clk: qcom: gcc-msm8939: remove defined but not used variables clk: qcom: ipq8074: make pcie0_rchng_clk_src static * clk-prima2: clk: clk-prima2: fix return value check in prima2_clk_init() * clk-bcm: clk: bcm2835: add missing release if devm_clk_hw_register fails clk: bcm: rpi: Add register to control pixel bvb clk
The HSDK PLL driver is only useful when building for an ARC HSDK platform. As ARC selects OF, the dependency on OF can just be replaced by a dependency on ARC_SOC_HSDK. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200807094351.1046-1-geert+renesas@glider.be Signed-off-by: Stephen Boyd <sboyd@kernel.org>
use CONFIG_COMMON_CLK_ROCKCHIP for Rk common clk drivers. use CONFIG_CLK_RKXX for Rk soc clk driver. Mark CONFIG_CLK_RK3399 to "tristate", to support building Rk3399 SoC clock driver as module. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200914022304.23908-1-zhangqing@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
CONFIG_IOMEM does not exist. The correct symbol to depend on is
CONFIG_HAS_IOMEM.
Fixes: 1e7468bd9d30a21e ("clk: Specify IOMEM dependency for HSDK pll driver")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200803084835.21838-1-geert+renesas@glider.be
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Need to merge this up to get the IOMEM dependency patch on top that is broken and fixed in the next commit. * clk-fixes: clk: Specify IOMEM dependency for HSDK pll driver clk: AST2600: Add mux for EMMC clock clk: mvebu: ARMADA_AP_CPU_CLK needs to select ARMADA_AP_CP_HELPER
The HSDK pll driver uses the devm_ioremap_resource function, but does not specify a dependency on IOMEM in Kconfig. This causes a build failure on architectures without IOMEM, for example, UML (notably with make allyesconfig). Fix this by making CONFIG_CLK_HSDK depend on CONFIG_IOMEM. Signed-off-by: David Gow <davidgow@google.com> Link: https://lore.kernel.org/r/20200630043214.1080961-1-davidgow@google.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
There is no need to select RATIONAL in individual drivers, since common clock symbol does it already. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200614115140.41262-1-andriy.shevchenko@linux.intel.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Since commit 84af7a6194e4 ("checkpatch: kconfig: prefer 'help' over
'---help---'"), the number of '---help---' has been gradually
decreasing, but there are still more than 2400 instances.
This commit finishes the conversion. While I touched the lines,
I also fixed the indentation.
There are a variety of indentation styles found.
a) 4 spaces + '---help---'
b) 7 spaces + '---help---'
c) 8 spaces + '---help---'
d) 1 space + 1 tab + '---help---'
e) 1 tab + '---help---' (correct indentation)
f) 1 tab + 1 space + '---help---'
g) 1 tab + 2 spaces + '---help---'
In order to convert all of them to 1 tab + 'help', I ran the
following commend:
$ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/'
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
- Support IDT VersaClock 5P49V5925 - Bunch of updates for HSDK clock generation unit (CGU) driver - New clk driver for Baikal-T1 SoCs * clk-vc5: dt: Add bindings for IDT VersaClock 5P49V5925 clk: vc5: Add support for IDT VersaClock 5P49V6965 * clk-hsdk: CLK: HSDK: CGU: add support for 148.5MHz clock CLK: HSDK: CGU: support PLL bypassing CLK: HSDK: CGU: check if PLL is bypassed first * clk-mediatek: clk: mediatek: assign the initial value to clk_init_data of mtk_mux clk: mediatek: Add MT6765 clock support clk: mediatek: add mt6765 clock IDs dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT6765 SoC dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC * clk-baikal: clk: Add Baikal-T1 CCU Dividers driver clk: Add Baikal-T1 CCU PLLs driver dt-bindings: clk: Add Baikal-T1 CCU Dividers binding dt-bindings: clk: Add Baikal-T1 CCU PLLs binding
- Start making audio and GPU clks work on Marvell MMP2/MMP3 SoCs - Add support for X1830 and X1000 Ingenic SoC clk controllers - Add support for Qualcomm's MSM8939 Generic Clock Controller - Add some GPU, NPU, and UFS clks to Qualcomm SM8150 driver - Enable supply regulators for GPU gdscs on Qualcomm SoCs - Add support for Si5342, Si5344 and Si5345 chips * clk-mmp: clk: mmp2: Add audio clock controller driver dt-bindings: clock: Add Marvell MMP Audio Clock Controller binding clk: mmp2: Add support for power islands dt-bindings: marvell,mmp2: Add ids for the power domains dt-bindings: clock: Make marvell,mmp2-clock a power controller clk: mmp2: Add the audio clock clk: mmp2: Add the I2S clocks clk: mmp2: Rename mmp2_pll_init() to mmp2_main_clk_init() clk: mmp2: Move thermal register defines up a bit dt-bindings: marvell,mmp2: Add clock id for the Audio clock dt-bindings: marvell,mmp2: Add clock id for the I2S clocks clk: mmp: frac: Allow setting bits other than the numerator/denominator clk: mmp: frac: Do not lose last 4 digits of precision * clk-intel: clk: intel: remove redundant initialization of variable rate64 clk: intel: Add CGU clock driver for a new SoC dt-bindings: clk: intel: Add bindings document & header file for CGU * clk-ingenic: clk: ingenic: Mark ingenic_tcu_of_match as __maybe_unused clk: X1000: Add FIXDIV for SSI clock of X1000. dt-bindings: clock: Add and reorder ABI for X1000. clk: Ingenic: Add CGU driver for X1830. dt-bindings: clock: Add X1830 clock bindings. clk: Ingenic: Adjust cgu code to make it compatible with X1830. clk: Ingenic: Remove unnecessary spinlock when reading registers. * clk-qcom: clk: qcom: Add missing msm8998 ufs_unipro_core_clk_src dt-bindings: clock: Add YAML schemas for QCOM A53 PLL clk: qcom: gcc-msm8939: Add MSM8939 Generic Clock Controller clk: qcom: gcc: Add support for Secure control source clock dt-bindings: clock: Add gcc_sec_ctrl_clk_src clock ID clk: qcom: gcc: Add support for a new frequency for SC7180 clk: qcom: Add DT bindings for MSM8939 GCC clk: qcom: gcc: Add missing UFS clocks for SM8150 clk: qcom: gcc: Add GPU and NPU clocks for SM8150 clk: qcom: mmcc-msm8996: Properly describe GPU_GX gdsc clk: qcom: gdsc: Handle GDSC regulator supplies clk: qcom: msm8916: Fix the address location of pll->config_reg * clk-silabs: clk: clk-si5341: Add support for the Si5345 series