linux-toradex.git/drivers/clk/ingenic, branch v4.19-rc1

clk: ingenic: Add missing flag for UDC clock

2018-07-06T18:47:28+00:00

The UDC clock of the JZ4740 SoC can be gated, but the data structure
representing it was missing the CGU_CLK_GATE flag to make it work.

Signed-off-by: Paul Cercueil 
Signed-off-by: Stephen Boyd

clk: ingenic: Fix incorrect data for the i2s clock

2018-07-06T18:47:27+00:00

The register field for configuring the divider for the i2s clock
occupies the bits [8-0], which means 9 bits and not 8.

Signed-off-by: Paul Cercueil 
Signed-off-by: Stephen Boyd

docs: Fix some broken references

2018-06-15T21:10:01+00:00

As we move stuff around, some doc references are broken. Fix some of
them via this script:
	./scripts/documentation-file-ref-check --fix

Manually checked if the produced result is valid, removing a few
false-positives.

Acked-by: Takashi Iwai 
Acked-by: Masami Hiramatsu 
Acked-by: Stephen Boyd 
Acked-by: Charles Keepax 
Acked-by: Mathieu Poirier 
Reviewed-by: Coly Li 
Signed-off-by: Mauro Carvalho Chehab 
Acked-by: Jonathan Corbet

clk: ingenic: jz4770: Add 150us delay after enabling VPU clock

2018-06-02T06:21:39+00:00

This is required, as we must not use the AHB1 bus before it is stable.

Signed-off-by: Paul Cercueil 
Signed-off-by: Stephen Boyd

clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clock

2018-06-02T06:21:33+00:00

This was broken before, because the AHB1 bus was enabled before the VPU
clock was ungated, while it must be done afterwards.

Signed-off-by: Paul Cercueil 
Signed-off-by: Stephen Boyd

clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idle

2018-06-02T06:21:33+00:00

When the main processor goes idle, by default its clock is stopped.
However, this also stops the clock of the co-processor.

Here, if the C1CLK clock is enabled, we disable this functionality.

Signed-off-by: Paul Cercueil 
Signed-off-by: Stephen Boyd

clk: ingenic: jz4770: Change OTG from custom to standard gated clock

2018-06-02T06:21:32+00:00

We now have the means to express the specificities of the OTG clock with
the common CGU code.

Signed-off-by: Paul Cercueil 
Signed-off-by: Stephen Boyd

clk: ingenic: Support specifying "wait for clock stable" delay

2018-06-02T06:21:31+00:00

Some clocks need a small delay after being ungated to run stable, as
using them too soon might result in hardware lockups.

Signed-off-by: Paul Cercueil 
Signed-off-by: Stephen Boyd

clk: ingenic: Add support for clocks whose gate bit is inverted

2018-06-02T06:21:09+00:00

Support the clocks which are gated when their gate bit is cleared
instead of set.

Signed-off-by: Paul Cercueil 
Signed-off-by: Stephen Boyd

clk: Add Ingenic jz4770 CGU driver

2018-01-18T22:05:55+00:00

Add support for the clocks provided by the CGU in the Ingenic JZ4770
SoC.

Signed-off-by: Paul Cercueil 
Signed-off-by: Maarten ter Huurne 
Acked-by: Stephen Boyd 
Cc: Ralf Baechle 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18482/
Signed-off-by: James Hogan