linux-toradex.git/drivers/clk/meson/Kconfig, branch v5.0

clk: meson: axg: add the audio clock controller driver

2018-07-09T11:48:26+00:00

The axg audio clock controller is the clock generation unit for the
amlogic audio subsystem of A113 based SoCs. It may be clocked by 8
different plls provided by the primary clock controller and also by
10 slave bit clocks and 10 slave sample clocks which may be provided
by external components, such as audio codecs, through the SoC pads.

It contains several muxes, dividers and gates which are fed into the
the different devices of the audio subsystem.

Acked-by: Neil Armstrong 
Signed-off-by: Jerome Brunet

clk: meson: add triple phase clock driver

2018-07-09T11:47:22+00:00

Add a driver to control the output of the sample clock generator found
in the axg audio clock controller.

The goal of this driver is to coherently control the phase provided to
the different element using the sample clock generator. This simplify
the usage of the sample clock generator a lot, without comprising the
ability of the SoC.

Acked-by: Neil Armstrong 
Signed-off-by: Jerome Brunet

clk: meson: clean-up meson clock configuration

2018-07-09T11:46:21+00:00

Clean the dependencies in meson clock Kconfig.
CLK_AMLOGIC should actually select CLK_REGMAP_MESON which it uses. Also,
each platform should select CLK_AMLOGIC, so everything is properly turned
on when the platform Kconfig enable each configuration flag

Acked-by: Neil Armstrong 
Signed-off-by: Jerome Brunet

clk: meson-axg: Add AO Clock and Reset controller driver

2018-05-15T12:19:43+00:00

Adds a Clock and Reset controller driver for the Always-On part
of the Amlogic Meson-AXG SoC.

Signed-off-by: Qiufang Dai 
Signed-off-by: Yixun Lan 
Signed-off-by: Jerome Brunet

clk: meson: aoclk: refactor common code into dedicated file

2018-05-15T12:19:42+00:00

We try to refactor the common code into one dedicated file,
while preparing to add new Meson-AXG aoclk driver, this would
help us to better share the code by all aoclk drivers.

Suggested-by: Jerome Brunet 
Signed-off-by: Yixun Lan 
Signed-off-by: Jerome Brunet

clk: meson: use hhi syscon if available

2018-03-13T09:04:04+00:00

On gxbb and axg, try to get the hhi regmap from the parent DT node, which
should be the HHI system controller once the necessary changes have been
made in amlogic's DTs

Until then, if getting regmap through the system controller fails, the
clock controller will fall back to the old way, requesting memory region
directly and then registering the regmap itself.

This should allow a smooth transition to syscon

Signed-off-by: Jerome Brunet 
Signed-off-by: Neil Armstrong

clk: meson: migrate gates to clk_regmap

2018-03-13T09:04:00+00:00

Move meson8b, gxbb and axg clocks using clk_gate to clk_regmap

Signed-off-by: Jerome Brunet 
Signed-off-by: Neil Armstrong

clk: meson: add regmap to the clock controllers

2018-03-13T09:04:00+00:00

This change registers a regmap in meson8b, gxbb and axg controllers.
The clock are still accessing their registers directly through iomem.
Once all clocks handled by these controllers have been move to regmap,
the regmap register will be removed and replaced with a syscon request.

This is needed because other drivers, such as the HDMI driver, need to
access the HHI register region

Acked-by: Martin Blumenstingl 
Signed-off-by: Jerome Brunet 
Signed-off-by: Neil Armstrong

clk: meson: switch gxbb ao_clk to clk_regmap

2018-03-13T09:03:59+00:00

Drop the gxbb ao specific regmap based clock and use the
meson clk_regmap based clock instead.

Signed-off-by: Jerome Brunet 
Signed-off-by: Neil Armstrong

clk: meson: add regmap clocks

2018-03-13T09:03:58+00:00

Meson clock controllers need to move the classical iomem registers to
regmap. This is triggered because the HHI controllers found on the GXBB
and GXL host more than just clocks. To properly handle this, we would
like to migrate HHI to syscon. Also GXBB AO clock controller already use
regmap, AXG AO and Audio clock controllers will as well.

The purpose of this change is to provide a common structure to these
meson controllers (and possibly others) for regmap based clocks.

This change provides the basic gate, mux and divider, based on the
helpers provided by the related generic clocks

Signed-off-by: Jerome Brunet 
Signed-off-by: Neil Armstrong