linux-toradex.git/drivers/clk/mvebu, branch v3.17-rc2

clk: mvebu: extend clk-cpu for dynamic frequency scaling

2014-07-16T12:58:38+00:00

This commit extends the existing clk-cpu driver used on Marvell Armada
XP platforms to support the dynamic frequency scaling of the CPU
clock. Non-dynamic frequency change was already supported (and used
before secondary CPUs are started), but the dynamic frequency change
requires a completely different procedure.

In order to achieve this, the clk_cpu_set_rate() function is reworked
to handle two separate cases:

 - The case where the clock is enabled, which is the new dynamic
   frequency change code, implemented in clk_cpu_on_set_rate(). This
   part will be used for cpufreq activities.

 - The case where the clock is disabled, which is the existing
   frequency change code, moved in clk_cpu_off_set_rate(). This part
   is already used to set the clock frequency of the secondary CPUs
   before starting them.

In order to implement the dynamic frequency change function, we need
to access the PMU DFS registers, which are outside the currently
mapped "Clock Complex" registers, so a new area of registers is now
mapped. This affects the Device Tree binding, but we are careful to do
it in a backward-compatible way (by allowing the second pair of
registers to be non-existent, and in this case, ensuring
clk_cpu_on_set_rate() returns an error).

Note that technically speaking, the clk_cpu_on_set_rate() does not do
the entire procedure needed to change the frequency dynamically, as it
involves touching a number of PMSU registers. This is done through a
clock notifier registered by the PMSU driver in followup commits.

Cc: 
Signed-off-by: Thomas Petazzoni 
Link: https://lkml.kernel.org/r/1404920715-19834-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper

clk: mvebu: add Orion5x clock driver

2014-04-26T01:03:55+00:00

This commit adds a core clock driver for the Orion5x SoC, with support
for the tclk, the CPU frequency and the DDR frequency. All the details
about the Sample-At-Reset register were extracted from the U-Boot
sources for Orion5x.

Note that Orion5x does not have gatable clocks, so this core clock
driver is sufficient to support clocking on Orion5x platforms.

Signed-off-by: Thomas Petazzoni 
Acked-by: Sebastian Hesselbarth 
Link: https://lkml.kernel.org/r/1398202002-28530-5-git-send-email-thomas.petazzoni@free-electrons.com
Cc: Mike Turquette 
Signed-off-by: Jason Cooper

Merge tag 'clk-mvebu-3xx-3.15-2' of git://git.infradead.org/linux-mvebu into clk-next-mvebu

2014-03-19T04:34:45+00:00

clock: mvebu new SoC changes for v3.15 (incremental pull #2)

 - mvebu (Armada 375)
    - fix ratio register offest

 - mvebu (Armada 380)
    - expand core divider clock driver to support 380 SoC (enables nand support)

clk: mvebu: Support Armada 380 SoC on the core divider clock

2014-03-13T23:24:23+00:00

This commit adds support for the Core Divider clocks of the Armada
380 SoCs. Similarly to Armada 370 and XP, the Core Divider clocks of
the 380 have gate capabilities. The only difference is the register layout.

Signed-off-by: Ezequiel Garcia 
Link: https://lkml.kernel.org/r/1394742273-5113-2-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper

clk: mvebu: Fix ratio register offset on A375 SoC

2014-03-13T23:20:27+00:00

This commit fixes the ratio register offset which is 0x4,
as per the Armada 375 SoC specification.

Signed-off-by: Ezequiel Garcia 
Link: https://lkml.kernel.org/r/1394638901-13368-2-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper

Merge branch 'clk-fixes' into clk-next

2014-02-25T07:07:53+00:00

clk: mvebu: add clock support for Armada 380/385

2014-02-17T02:34:05+00:00

Add the clock support for the new SoCs Armada 380 and Armada 385:
core clocks and gating clocks.

Signed-off-by: Gregory CLEMENT 
Reviewed-by: Thomas Petazzoni 
Signed-off-by: Jason Cooper

clk: mvebu: add clock support for Armada 375

2014-02-17T02:34:01+00:00

Add the clock support for the new SoC Armada 375: core clocks and
gating clocks.

Signed-off-by: Gregory CLEMENT 
Reviewed-by: Thomas Petazzoni 
Signed-off-by: Jason Cooper

clk: mvebu: add Armada 375 support to the corediv clock driver

2014-02-17T02:33:59+00:00

This commit adds support for the Core Divider clocks of the Armada
375. Compared to Armada 370 and XP the Core Divider clocks of the 375
cannot be gated: only their ratio can be changed. This is reflected by
the fact that the enable, disable and is_enabled clock operations are
not defined, and that the enable_bit_offset field is also undefined.

Signed-off-by: Thomas Petazzoni 
Signed-off-by: Ezequiel Garcia 
Signed-off-by: Jason Cooper

clk: mvebu: refactor corediv driver to support more SoC

2014-02-17T02:33:57+00:00

This commit refactors the corediv clock driver so that it is capable
of handling various SOCs that have slightly different corediv clock
registers and capabilities.

It introduces a clk_corediv_soc_desc structure that encapsulates all
the SoC specific details.

Signed-off-by: Thomas Petazzoni 
Signed-off-by: Ezequiel Garcia 
Signed-off-by: Jason Cooper