linux-toradex.git/drivers/clk/qcom, branch v4.1.10

clk: qcom: Fix MSM8916 prng clock enable bit

2015-09-21T17:05:33+00:00

commit 1c4b4b0eb1909010b8ebda1ef208bf3ed62e7487 upstream.

Fix the enable bit of the pseudorandom number generator clock.

Reported-by: Stanimir Varbanov 
Fixes: 3966fab8b6ab "clk: qcom: Add MSM8916 Global Clock Controller support"
Signed-off-by: Georgi Djakov 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: qcom: Set CLK_SET_RATE_PARENT on ce1 clocks

2015-09-21T17:05:32+00:00

commit d7a304e9d018c99dda80f4c16ec0fe817b5be4a1 upstream.

The other ce clocks have the flag set, but ce1 doesn't, so
clk_set_rate() doesn't propagate up the tree to the ce1_src_clk.
Set the flag as this is supported.

Reported-by: Bjorn Andersson 
Tested-by: Bjorn Andersson 
Fixes: 02824653200b ("clk: qcom: Add APQ8084 Global Clock Controller support")
Fixes: d33faa9ead8d ("clk: qcom: Add support for MSM8974's global clock controller (GCC)")
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: qcom: Use parent rate when set rate to pixel RCG clock

2015-08-03T16:29:17+00:00

commit 6d451367bfa16fc103604bacd258f534c65d1540 upstream.

Since the parent rate has been recalculated, pixel RCG clock
should rely on it to find the correct M/N values during set_rate,
instead of calling __clk_round_rate() to its parent again.

Signed-off-by: Hai Li 
Tested-by: Archit Taneja 
Fixes: 99cbd064b059 ("clk: qcom: Support display RCG clocks")
[sboyd@codeaurora.org: Silenced unused parent variable warning]
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: qcom: Fix MSM8916 gfx3d_clk_src configuration

2015-05-01T01:42:55+00:00

The gfx3d_clk_src parents configuration is incorrect. Fix it.

Fixes: 3966fab8b6ab "clk: qcom: Add MSM8916 Global Clock Controller support"
Signed-off-by: Georgi Djakov 
Signed-off-by: Stephen Boyd

clk: qcom: Fix MSM8916 venus divider value

2015-05-01T01:42:48+00:00

One of the video codec clock frequencies has incorrect divider
value. Fix it.

Fixes: 3966fab8b6ab "clk: qcom: Add MSM8916 Global Clock Controller support"
Signed-off-by: Georgi Djakov 
Signed-off-by: Stephen Boyd

clk: qcom: Fix parent_map translations

2015-04-08T18:07:38+00:00

When we introduced the parent_map tables, we missed to update
some of the functions where mapping is translated. Fix this.

Signed-off-by: Georgi Djakov 
Tested-by: Nicolas Dechesne 
Signed-off-by: Stephen Boyd

clk: qcom: fix driver dependencies

2015-04-07T23:14:54+00:00

Support for Qualcomm's clock controllers should be available only
on Qualcomm platforms.

Signed-off-by: Bartlomiej Zolnierkiewicz 
Acked-by: Kyungmin Park 
Cc: Mike Turquette 
Signed-off-by: Stephen Boyd

clk: qcom: Add EBI2 clocks for IPQ806x

2015-04-06T21:07:49+00:00

The NAND controller within EBI2 requires EBI2_CLK and
EBI2_ALWAYS_ON_CLK clocks.  Create structs for these clocks so
that they can be used by the NAND controller driver. Add an entry
for EBI2_AON_CLK in the gcc-ipq806x DT binding document.

Signed-off-by: Archit Taneja 
Signed-off-by: Stephen Boyd

clk: qcom: fix simple_return.cocci warnings

2015-03-27T05:43:47+00:00

drivers/clk/qcom/clk-pll.c:74:1-4: WARNING: end returns can be simpified

 Simplify a trivial if-return sequence.  Possibly combine with a
 preceding function call.
Generated by: scripts/coccinelle/misc/simple_return.cocci

Signed-off-by: Fengguang Wu 
Signed-off-by: Stephen Boyd

clk: qcom: Fix ipq806x LCC frequency tables

2015-03-27T05:43:30+00:00

These frequency tables list the wrong rates. Either they don't
have the correct frequency at all, or they're specified in kHz
instead of Hz. Fix it.

Fixes: c99e515a92e9 "clk: qcom: Add IPQ806X LPASS clock controller (LCC) driver"
Tested-by: Kenneth Westfield 
Signed-off-by: Stephen Boyd