linux-toradex.git/drivers/clk/renesas, branch v4.9.123

clk: renesas: cpg-mssr: Stop using printk format %pCr

2018-07-03T09:23:06+00:00

commit ef4b0be62641d296cf4c0ad8f75ab83ab066ed51 upstream.

Printk format "%pCr" will be removed soon, as clk_get_rate() must not be
called in atomic context.

Replace it by open-coding the operation.  This is safe here, as the code
runs in task context.

Link: http://lkml.kernel.org/r/1527845302-12159-2-git-send-email-geert+renesas@glider.be
To: Jia-Ju Bai 
To: Jonathan Corbet 
To: Michael Turquette 
To: Stephen Boyd 
To: Zhang Rui 
To: Eduardo Valentin 
To: Eric Anholt 
To: Stefan Wahren 
To: Greg Kroah-Hartman 
Cc: Sergey Senozhatsky 
Cc: Petr Mladek 
Cc: Linus Torvalds 
Cc: Steven Rostedt 
Cc: linux-doc@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-serial@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Geert Uytterhoeven 
Cc: stable@vger.kernel.org # 4.5+
Signed-off-by: Geert Uytterhoeven 
Acked-by: Stephen Boyd 
Signed-off-by: Petr Mladek 
Signed-off-by: Greg Kroah-Hartman

clk: fix false-positive Wmaybe-uninitialized warning

2018-04-24T07:34:14+00:00

commit ce33f284935e08229046b30635e6aadcbab02b53 upstream.

When we build this driver with on x86-32, gcc produces a false-positive warning:

drivers/clk/renesas/clk-sh73a0.c: In function 'sh73a0_cpg_clocks_init':
drivers/clk/renesas/clk-sh73a0.c:155:10: error: 'parent_name' may be used uninitialized in this function [-Werror=maybe-uninitialized]
   return clk_register_fixed_factor(NULL, name, parent_name, 0,

We can work around that warning by adding a fake initialization, I tried
and failed to come up with any better workaround. This is currently one
of few remaining warnings for a 4.14.y randconfig build, so it would be
good to also have it backported at least to that version. Older versions
have more randconfig warnings, so we might not care.

I had not noticed this earlier, because one patch in my randconfig test
tree removes the '-ffreestanding' option on x86-32, and that avoids
the warning. The -ffreestanding flag was originally global but moved
into arch/i386 by Andi Kleen in commit 6edfba1b33c7 ("[PATCH] x86_64:
Don't define string functions to builtin") as a 'temporary workaround'.

Like many temporary hacks, this turned out to be rather long-lived, from
all I can tell we still need a simple fix to asm/string_32.h before it
can be removed, but I'm not sure about how to best do that.

Cc: stable@vger.kernel.org
Cc: Andi Kleen 
Signed-off-by: Arnd Bergmann 
Acked-by: Geert Uytterhoeven 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: renesas: rcar-gen2: Fix PLL0 on R-Car V2H and E2

2018-04-13T17:47:57+00:00

[ Upstream commit b7c563c489e94417efbad68d057ea5d2030ae44c ]

R-Car V2H and E2 do not have the PLL0CR register, but use a fixed
multiplier (depending on mode pins) and divider.

This corrects the clock rate of "pll0" (PLL0 VCO after post divider) on
R-Car V2H and E2 from 1.5 GHz to 1 GHz.

Inspired by Sergei Shtylyov's work for the common R-Car Gen2 and RZ/G
Clock Pulse Generator support core.

Fixes: 7c4163aae3d8e5b9 ("ARM: dts: r8a7792: initial SoC device tree")
Fixes: 0dce5454d5c25858 ("ARM: shmobile: Initial r8a7794 SoC device tree")
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman

clk: renesas: mstp: Support 8-bit registers for r7s72100

2017-01-12T10:39:28+00:00

commit e2a33c34ddff22ee208d80abdd12b88a98d6cb60 upstream.

The RZ/A1 is different than the other Renesas SOCs because the MSTP
registers are 8-bit instead of 32-bit and if you try writing values as
32-bit nothing happens...meaning this driver never worked for r7s72100.

Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi")
Signed-off-by: Chris Brandt 
Reviewed-by: Geert Uytterhoeven 
Tested-by: Geert Uytterhoeven 
Acked-by: Kuninori Morimoto 
Signed-off-by: Stephen Boyd 
Signed-off-by: Greg Kroah-Hartman

clk: renesas: cpg-mssr: Fix inverted debug check

2017-01-12T10:39:24+00:00

commit bc4725d9029e2c8205fbaf1105e193d1c4e463bb upstream.

The intention was to enable the checks if debugging is enabled, not
disabled.

Fixes: f793d1e51705b276 ("clk: shmobile: Add new CPG/MSSR driver core")
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Greg Kroah-Hartman

clk/Renesas-MSTP: Use kmalloc_array() in cpg_mstp_clocks_init()

2016-09-16T23:13:09+00:00

A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "kmalloc_array".

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Stephen Boyd

Merge tag 'clk-renesas-for-v4.9-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

2016-09-14T18:15:03+00:00

Pull renesas clk driver updates from Geert Uytterhoeven:

  - External crystal selection for RZ/A1,
  - CMT clocks for R-Car H3 and M3-W,
  - RAVB and Thermal clocks for R-Car M3-W.

* tag 'clk-renesas-for-v4.9-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: r8a7796: Add CMT clocks
  clk: renesas: r8a7795: Add CMT clocks
  clk: renesas: r8a7796: Add RAVB clock
  clk: renesas: r8a7796: Add THS/TSC clock
  clk: renesas: rz: Select EXTAL vs USB clock

clk: renesas: r8a7796: Add CMT clocks

2016-09-12T09:08:01+00:00

This patch adds CMT module clocks for r8a7796 SoC.

Signed-off-by: Bui Duc Phuc 
Signed-off-by: Geert Uytterhoeven

clk: renesas: r8a7795: Add CMT clocks

2016-09-12T09:08:00+00:00

This patch adds CMT module clocks for r8a7795 SoC.

Signed-off-by: Bui Duc Phuc 
Signed-off-by: Geert Uytterhoeven

clk: renesas: r8a7796: Add RAVB clock

2016-09-12T09:08:00+00:00

Signed-off-by: Laurent Pinchart 
Signed-off-by: Geert Uytterhoeven