linux-toradex.git/drivers/clk/rockchip/Kconfig, branch master

clk: rockchip: Add clock controller for the RV1106

2026-08-05T20:45:11+00:00

Add the clock and reset controller driver for the Rockchip RV1106,
based on the vendor kernel from the Luckfox Pico SDK [1] at commit
824b817f8 (a Linux 5.10.160 kernel tree), adapted to the upstream
clock framework.

The MMC drive and sample phase clocks have their control registers in
the GRF region. The CRU provides these clocks itself, using the syscon
referenced by the rockchip,grf property as an auxiliary regmap, in the
same way as the RK3528.

The RV1103 is a package variant of the RV1106 and uses the same CRU.

[1] https://github.com/LuckfoxTECH/luckfox-pico

Signed-off-by: Simon Glass 
Link: https://patch.msgid.link/20260729133609.3465563-3-sjg@chromium.org
Signed-off-by: Heiko Stuebner

clk: rockchip: allow COMPILE_TEST builds

2026-05-13T10:35:57+00:00

COMMON_CLK_ROCKCHIP already gates the Rockchip clock objects inside the
Rockchip clock Makefile.  Allow selecting it for COMPILE_TEST and use it
for the parent Makefile descent instead of ARCH_ROCKCHIP.

The per-SoC Rockchip clock symbols already have COMPILE_TEST dependencies,
so this exposes the existing build coverage to other architectures without
selecting the Rockchip platform.

Tested with:
make LLVM=1 ARCH=loongarch drivers/clk/rockchip/

Assisted-by: Codex:GPT-5.5
Signed-off-by: Rosen Penev 
Reviewed-by: Brian Masney 
Link: https://patch.msgid.link/20260509003602.956186-1-rosenp@gmail.com
Signed-off-by: Heiko Stuebner

clk: rockchip: Add clock controller for the RV1103B

2026-03-02T11:51:26+00:00

Add the clock and reset tree definitions for the RV1103B SoC.

Based on the 5.10 Rockchip vendor kernel driver.

Signed-off-by: Fabio Estevam 
Link: https://patch.msgid.link/20260210022620.172570-2-festevam@gmail.com
Signed-off-by: Heiko Stuebner

clk: rockchip: Add clock and reset driver for RK3506

2025-11-23T21:56:49+00:00

Add the clock and reset tree definitions for the new
RK3506 SoC.

Signed-off-by: Finley Xiao 
Signed-off-by: Elaine Zhang 
Link: https://patch.msgid.link/20251121075350.2564860-3-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner

clk: rockchip: Add clock controller for the RV1126B

2025-11-20T19:57:42+00:00

Add the clock and reset tree definitions for the new
rv1126b SoC.

Signed-off-by: Elaine Zhang 
Link: https://patch.msgid.link/20251111025738.869847-4-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner

clk: rockchip: Add clock controller for the RK3562

2025-03-02T16:51:51+00:00

Add the clock tree definition for the new RK3562 SoC.

Signed-off-by: Finley Xiao 
Signed-off-by: Tao Huang 
Signed-off-by: Sugar Zhang 
Signed-off-by: Kever Yang 
Link: https://lore.kernel.org/r/20250227105916.2340856-3-kever.yang@rock-chips.com
[dropped non-working module code, cleaned up init a bit to address
 build failure reported from kernel test robot
 Reported-by: kernel test robot 
 Closes: https://lore.kernel.org/oe-kbuild-all/202503021302.FjsycBI2-lkp@intel.com/ ]
Signed-off-by: Heiko Stuebner

clk: rockchip: Add clock controller driver for RK3528 SoC

2025-02-26T17:04:29+00:00

Add clock tree definition for RK3528. Similar to previous Rockchip
SoCs, clock controller of RK3528 is combined with the reset controller.
We omit the reset part for now since it's hard to test it without
support for other basic peripherals.

Signed-off-by: Yao Zi 
Link: https://lore.kernel.org/r/20250217061142.38480-8-ziyao@disroot.org
Signed-off-by: Heiko Stuebner

clk: rockchip: Add clock controller for the RK3576

2024-08-29T09:13:33+00:00

Add the clock and reset tree definitions for the new RK3576
SoC.

As opposed to the other rockchip CRU drivers, the GRF node is looked up
via compatible instead of a phandle, which simplifies the device tree
bindings.

Signed-off-by: Elaine Zhang 
Signed-off-by: Finley Xiao 
Signed-off-by: YouMin Chen 
Signed-off-by: Liang Chen 
Signed-off-by: Sugar Zhang 
Signed-off-by: Detlev Casanova 
Reviewed-by: Elaine Zhang 
Tested-by: Shawn Lin 
Acked-by: Dragan Simic 
Link: https://lore.kernel.org/r/0102019199a7781a-888440f0-a3f7-4a7d-a831-491260cbdfe7-000000@eu-west-1.amazonses.com
[dropped additional blank line at EOF in rst-rk3576.c
 dropped the whole (non-)working as module part]
Signed-off-by: Heiko Stuebner

clk: rockchip: add clock controller for the RK3588

2022-11-15T10:37:41+00:00

Add full clock controller support RK3588.

[rebase, integrate fixes from Wyon and Finley, add missing frequencies
 to PLL lookup table, update commit message, add GATE_LINK clocks which
 downstream handles in its own driver with one DT node per clock]

Signed-off-by: Wyon Bi 
Signed-off-by: Finley Xiao 
Signed-off-by: Elaine Zhang 
Signed-off-by: Sebastian Reichel 
Link: https://lore.kernel.org/r/20221018151407.63395-10-sebastian.reichel@collabora.com
[dropped module stuff after talking to Sebastian]
Signed-off-by: Heiko Stuebner

clk: rockchip: Add clock controller support for RV1126 SoC

2022-09-23T09:15:30+00:00

Clock & Reset Unit (CRU) in RV1126 support clocks for CRU
and CRU_PMU blocks.

This patch is trying to add minimal Clock-Architecture Diagram's
inferred from [1] authored by Finley Xiao.

[1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/drivers/clk/rockchip/clk-rv1126.c

Cc: linux-clk@vger.kernel.org
Cc: Michael Turquette 
Cc: Stephen Boyd 
Signed-off-by: Finley Xiao 
Signed-off-by: Jagan Teki 
Link: https://lore.kernel.org/r/20220915163947.1922183-5-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner