<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-toradex.git/drivers/clk/socfpga, branch v3.14.20</title>
<subtitle>Linux kernel for Apalis and Colibri modules</subtitle>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/'/>
<entry>
<title>clk: socfpga: Use NULL instead of 0</title>
<updated>2013-12-20T01:47:32+00:00</updated>
<author>
<name>Sachin Kamat</name>
<email>sachin.kamat@linaro.org</email>
</author>
<published>2013-10-08T11:17:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=6d7ff6cc9cf6ed2d2f701dc6501a77873c3c7d11'/>
<id>6d7ff6cc9cf6ed2d2f701dc6501a77873c3c7d11</id>
<content type='text'>
'div_reg' is a pointer. Assign NULL instead of 0.

Signed-off-by: Sachin Kamat &lt;sachin.kamat@linaro.org&gt;
Acked-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
'div_reg' is a pointer. Assign NULL instead of 0.

Signed-off-by: Sachin Kamat &lt;sachin.kamat@linaro.org&gt;
Acked-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: socfpga: Remove check for "reg" property in socfpga_clk_init</title>
<updated>2013-11-27T20:48:51+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@altera.com</email>
</author>
<published>2013-10-24T08:18:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=4d04391cfe6446fb2f184d063b56a4dcce425334'/>
<id>4d04391cfe6446fb2f184d063b56a4dcce425334</id>
<content type='text'>
The function socfpga_clk_init() can support clocks that do not have a divider
register, but a fixed-divider that can be read from DTS. Therefore, the "reg"
property is not a failing condition for socfpga_clk_init().

Signed-off-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The function socfpga_clk_init() can support clocks that do not have a divider
register, but a fixed-divider that can be read from DTS. Therefore, the "reg"
property is not a failing condition for socfpga_clk_init().

Signed-off-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: socfpga: Fix incorrect sdmmc clock name</title>
<updated>2013-10-08T01:37:49+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@altera.com</email>
</author>
<published>2013-09-17T16:23:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=79a2e998895ae3e75d6d3d9fdeec2be94bfcf6c8'/>
<id>79a2e998895ae3e75d6d3d9fdeec2be94bfcf6c8</id>
<content type='text'>
The SD/MMC clock is named "sdmmc_clk", and NOT "mmc_clk". Because of this,
the SD driver was getting the incorrect clock value. This prevented the
SD driver from initializing correctly.

Signed-off-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
CC: Arnd Bergmann &lt;arnd@arndb.de&gt;
CC: Olof Johansson &lt;olof@lixom.net&gt;
Reviewed-by: Pavel Machek &lt;pavel@denx.de&gt;
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SD/MMC clock is named "sdmmc_clk", and NOT "mmc_clk". Because of this,
the SD driver was getting the incorrect clock value. This prevented the
SD driver from initializing correctly.

Signed-off-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
CC: Arnd Bergmann &lt;arnd@arndb.de&gt;
CC: Olof Johansson &lt;olof@lixom.net&gt;
Reviewed-by: Pavel Machek &lt;pavel@denx.de&gt;
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mike Turquette &lt;mturquette@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: socfpga: Add support to gate peripheral clocks</title>
<updated>2013-06-11T23:35:29+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@altera.com</email>
</author>
<published>2013-06-05T15:02:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=825f0c26720668aefe3ed93be70e3bccf2337033'/>
<id>825f0c26720668aefe3ed93be70e3bccf2337033</id>
<content type='text'>
Add support to gate the clocks that directly feed peripherals. For clocks
with multiple parents, add the ability to determine the correct parent,
and also set parents. Also add support to calculate and set the clocks'
rate.

Signed-off-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Reviewed-by: Pavel Machek &lt;pavel@denx.de&gt;
Acked-by: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
CC: Arnd Bergmann &lt;arnd@arndb.de&gt;
CC: Olof Johansson &lt;olof@lixom.net&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
CC: &lt;linux@arm.linux.org.uk&gt;

v4:
- Add Acked-by: Mike Turquette

v3:
- Addressed comments from Pavel

v2:
- Fix space/indent errors
- Add streq for strcmp == 0
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support to gate the clocks that directly feed peripherals. For clocks
with multiple parents, add the ability to determine the correct parent,
and also set parents. Also add support to calculate and set the clocks'
rate.

Signed-off-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Reviewed-by: Pavel Machek &lt;pavel@denx.de&gt;
Acked-by: Mike Turquette &lt;mturquette@linaro.org&gt;
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
CC: Arnd Bergmann &lt;arnd@arndb.de&gt;
CC: Olof Johansson &lt;olof@lixom.net&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
CC: &lt;linux@arm.linux.org.uk&gt;

v4:
- Add Acked-by: Mike Turquette

v3:
- Addressed comments from Pavel

v2:
- Fix space/indent errors
- Add streq for strcmp == 0
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entries</title>
<updated>2013-04-15T03:18:13+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@altera.com</email>
</author>
<published>2013-04-11T15:55:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=56c5c13f7080f9299a92b3fb6a1bf22689d607cc'/>
<id>56c5c13f7080f9299a92b3fb6a1bf22689d607cc</id>
<content type='text'>
With this patch, the socfpga clk driver is able to query the clock and clock
rates appropriately.

Signed-off-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Reviewed-by: Pavel Machek &lt;pavel@denx.de&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With this patch, the socfpga clk driver is able to query the clock and clock
rates appropriately.

Signed-off-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Reviewed-by: Pavel Machek &lt;pavel@denx.de&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: socfpga: initial support for Altera's SOCFPGA platform</title>
<updated>2012-07-19T08:39:00+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@altera.com</email>
</author>
<published>2012-07-18T22:07:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.toradex.cn/cgit/linux-toradex.git/commit/?id=66314223aa5e862c9d1d068cb7186b4fd58ebeaa'/>
<id>66314223aa5e862c9d1d068cb7186b4fd58ebeaa</id>
<content type='text'>
Adding core definitions for Altera's SOCFPGA ARM platform.
Mininum support for Altera's SOCFPGA Cyclone 5 hardware.

Signed-off-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Reviewed-by: Pavel Machek &lt;pavel@denx.de&gt;
Reviewed-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Reviewed-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Adding core definitions for Altera's SOCFPGA ARM platform.
Mininum support for Altera's SOCFPGA Cyclone 5 hardware.

Signed-off-by: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Reviewed-by: Pavel Machek &lt;pavel@denx.de&gt;
Reviewed-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Reviewed-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
