linux-toradex.git/drivers/clk/socfpga, branch v4.9.65

clk: socfpga: allow for multiple parents on Arria10 periph clocks

2016-02-22T22:17:37+00:00

There are some Arria10 clocks of type "altr,socfpga-a10-perip-clk" that can
have multiple parents. Fix up the __socfpga_periph_init() to call
of_clk_parent_fill() that will return the appropriate number of parents.

Also, update __socfpga_gate_init() to call of_clk_parent_fill() helper
function.

Signed-off-by: Dinh Nguyen 
Signed-off-by: Stephen Boyd

clk: socfpga: fix __init annotation

2016-02-08T22:13:31+00:00

clang found a bug with the __socfpga_pll_init definition:

drivers/clk/socfpga/clk-pll-a10.c:77:15: error: '__section__' attribute only applies to functions and
      global variables

This moves the __init annotation to the right place so the function
actually gets discarded.

Signed-off-by: Arnd Bergmann 
Signed-off-by: Stephen Boyd

clk: socfpga: Add a second parent option for the dbg_base_clk

2015-08-24T23:49:03+00:00

The debug base clock can be bypassed from the main PLL to the OSC1 clock.
The bypass register is the staysoc1(0x10) register that is in the clock
manager.

This patch adds the option to get the correct parent for the debug base
clock.

Signed-off-by: Dinh Nguyen 
Signed-off-by: Stephen Boyd

clk: socfpga: switch to GENMASK()

2015-07-28T18:59:16+00:00

Convert the code to use GENMASK() helper instead of div_mask() macro.

Signed-off-by: Andy Shevchenko 
Acked-by: Dinh Nguyen 
Signed-off-by: Stephen Boyd

clk: socfpga: Remove clk.h and clkdev.h includes

2015-07-20T18:11:14+00:00

Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver. The clkdev.h include isn't used either, remove
it and add in slab.h to make sure things keep compiling.

Acked-by: Dinh Nguyen 
Signed-off-by: Stephen Boyd

clk: socfpga: remove a stray tab

2015-06-10T01:14:27+00:00

This line was indented too far.

Signed-off-by: Dan Carpenter 
Acked-by: Dinh Nguyen 
Signed-off-by: Michael Turquette

clk: socfpga: make use of of_clk_parent_fill helper function

2015-06-06T01:10:34+00:00

Use of_clk_parent_fill to fill in the parent clock's array.

Signed-off-by: Dinh Nguyen 
Signed-off-by: Stephen Boyd

clk: socfpga: add a clock driver for the Arria 10 platform

2015-05-21T22:16:04+00:00

The clocks on the Arria 10 platform is a bit different than the
Cyclone/Arria 5 platform that it should just have it's own
driver.

Signed-off-by: Dinh Nguyen 
Signed-off-by: Stephen Boyd

clk: socfpga: update clk.h so for Arria10 platform to use

2015-05-21T22:10:38+00:00

There are 5 possible parent clocks for the SoCFPGA Arria10. Move the define
SYSMGR_SDMMC_CTRL_SET and streq() to clk.h so that the Arria clock driver
can use.

Signed-off-by: Dinh Nguyen 
Signed-off-by: Stephen Boyd

clk: socfpga: Silence sparse warning

2015-05-15T00:11:28+00:00

drivers/clk/socfpga/clk-periph.c:79:39: warning: Using plain integer as NULL pointer

Cc: Dinh Nguyen 
Signed-off-by: Stephen Boyd